mc9s12c32mpb16 Freescale Semiconductor, Inc, mc9s12c32mpb16 Datasheet - Page 304

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mc9s12c32mpb16

Manufacturer Part Number
mc9s12c32mpb16
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
10.3.2.9
The CANTARQ register allows abort request of queued messages as described below.
Read: Anytime
Write: Anytime when not in initialization mode
304
Module Base + 0x0008
ABTRQ[2:0]
Field
2:0
Reset:
W
R
Abort Request — The CPU sets the ABTRQx bit to request that a scheduled message buffer (TXEx = 0) be
aborted. The MSCAN grants the request if the message has not already started transmission, or if the
transmission is not successful (lost arbitration or error). When a message is aborted, the associated TXE (see
Section 10.3.2.7, “MSCAN Transmitter Flag Register
Section 10.3.2.10, “MSCAN Transmitter Message Abort Acknowledge Register
transmit interrupt occurs if enabled. The CPU cannot reset ABTRQx. ABTRQx is reset whenever the associated
TXE flag is set.
0 No abort request
1 Abort request pending
Figure 10-12. MSCAN Transmitter Message Abort Request Register (CANTARQ)
MSCAN Transmitter Message Abort Request Register (CANTARQ)
The CANTARQ register is held in the reset state when the initialization
mode is active (INITRQ = 1 and INITAK = 1). This register is writable when
not in initialization mode (INITRQ = 0 and INITAK = 0).
0
0
7
= Unimplemented
Table 10-13. CANTARQ Register Field Descriptions
6
0
0
MC9S12C-Family / MC9S12GC-Family
0
0
5
Rev 01.23
NOTE
4
0
0
Description
(CANTFLG)”) and abort acknowledge flags (ABTAK, see
0
0
3
ABTRQ2
2
0
(CANTAAK)”) are set and a
ABTRQ1
Freescale Semiconductor
0
1
ABTRQ0
0
0

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