mc9s12c32mpb16 Freescale Semiconductor, Inc, mc9s12c32mpb16 Datasheet - Page 452

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mc9s12c32mpb16

Manufacturer Part Number
mc9s12c32mpb16
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Module Base + 0x0011 = TC0L
Chapter 15 Timer Module (TIM16B8CV1) Block Description
Depending on the TIOS bit for the corresponding channel, these registers are used to latch the value of the
free-running counter when a defined transition is sensed by the corresponding input capture edge detector
or to trigger an output action for output compare.
Read: Anytime
Write: Anytime for output compare function.Writes to these registers have no meaning or effect during
input capture. All timer input capture/output compare registers are reset to 0x0000.
15.3.2.15 16-Bit Pulse Accumulator Control Register (PACTL)
When PAEN is set, the PACT is enabled.The PACT shares the input pin with IOC7.
Read: Any time
Write: Any time
452
Module Base + 0x0020
Reset
W
R
Reset
W
R
0x0013 = TC1L
0x0015 = TC2L
0x0017 = TC3L
0
0
7
Read/Write access in byte mode for high byte should takes place before low
byte otherwise it will give a different result.
Figure 15-23. Timer Input Capture/Output Compare Register x Low (TCxL)
Bit 7
0
7
Figure 15-24. 16-Bit Pulse Accumulator Control Register (PACTL)
Unimplemented or Reserved
PAEN
0
6
Bit 6
0
6
PAMOD
MC9S12C-Family / MC9S12GC-Family
0x0019 = TC4L
0x001B = TC5L
0x001D = TC6L
0x001F = TC7L
0
5
Bit 5
0
5
PEDGE
Rev 01.23
NOTE
0
4
Bit 4
0
4
CLK1
0
3
Bit 3
0
3
CLK0
0
2
Bit 2
0
2
Freescale Semiconductor
PAOVI
0
1
Bit 1
0
1
PAI
Bit 0
0
0
0
0

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