mc9s12c32mpb16 Freescale Semiconductor, Inc, mc9s12c32mpb16 Datasheet - Page 357

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mc9s12c32mpb16

Manufacturer Part Number
mc9s12c32mpb16
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
12.3.2.5
The PWMCAE register contains six control bits for the selection of center aligned outputs or left aligned
outputs for each PWM channel. If the CAEx bit is set to a 1, the corresponding PWM output will be center
aligned. If the CAEx bit is cleared, the corresponding PWM output will be left aligned. Reference
Section 12.4.2.5, “Left Aligned Outputs,”
detailed description of the PWM output modes.
Freescale Semiconductor
PCKB[2:0]
PCKA[2:0]
Field
6:5
2:0
Prescaler Select for Clock B — Clock B is 1 of two clock sources which can be used for channels 2 or 3. These
three bits determine the rate of clock B, as shown in
Prescaler Select for Clock A — Clock A is 1 of two clock sources which can be used for channels 0, 1, 4, or 5.
These three bits determine the rate of clock A, as shown in
PWM Center Align Enable Register (PWMCAE)
PCKB2
PCKA2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Table 12-5. PWMPRCLK Field Descriptions
Table 12-6. Clock B Prescaler Selects
Table 12-7. Clock A Prescaler Selects
MC9S12C-Family / MC9S12GC-Family
PCKB1
PCKA1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
and
Section 12.4.2.6, “Center Aligned Outputs,”
Rev 01.23
PCKB0
PCKA0
Chapter 12 Pulse-Width Modulator (PWM8B6CV1) Block Description
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
Table
12-6.
Table
Value of Clock B
Value of Clock A
Bus Clock / 128
Bus Clock / 128
12-7.
Bus Clock / 16
Bus Clock / 32
Bus Clock / 16
Bus Clock / 32
Bus Clock / 64
Bus Clock / 64
Bus Clock / 2
Bus Clock / 4
Bus Clock / 8
Bus Clock / 2
Bus Clock / 4
Bus Clock / 8
Bus Clock
Bus Clock
for a more
357

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