mc9s12c32mpb16 Freescale Semiconductor, Inc, mc9s12c32mpb16 Datasheet - Page 451

• Manufacturer Part Number: mc9s12c32mpb16
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Module Base + 0x0010 = TC0H
15.3.2.13 Main Timer Interrupt Flag 2 (TFLG2)
TFLG2 indicates when interrupt conditions have occurred. To clear a bit in the flag register, write the bit
to one.
Read: Anytime
Write: Used in clearing mechanism (set bits cause corresponding bits to be cleared).
Any access to TCNT will clear TFLG2 register if the TFFCA bit in TSCR register is set.
15.3.2.14 Timer Input Capture/Output Compare Registers High and Low 0–7
Freescale Semiconductor
Module Base + 0x000F
C[7:0]F
Reset
Field
Field
TOF
7:0
7
W
Reset
R
W
R
0x0012 = TC1H
0x0014 = TC2H
0x0016 = TC3H
Input Capture/Output Compare Channel “x” Flag — These flags are set when an input capture or output
compare event occurs. Clear a channel flag by writing one to it.
When TFFCA bit in TSCR register is set, a read from an input capture or a write into an output compare channel
(0x0010–0x001F) will cause the corresponding channel flag CxF to be cleared.
TOF
Timer Overflow Flag — Set when 16-bit free-running timer overflows from 0xFFFF to 0x0000. This bit is cleared
automatically by a write to the TFLG2 register with bit 7 set. (See also TCRE control bit explanation.)
(TCxH and TCxL)
0
7
Figure 15-22. Timer Input Capture/Output Compare Register x High (TCxH)
Bit 15
15
0
Unimplemented or Reserved
0
0
6
Bit 14
Figure 15-21. Main Timer Interrupt Flag 2 (TFLG2)
14
0
Table 15-15. TRLG1 Field Descriptions
Table 15-16. TRLG2 Field Descriptions
0x0018 = TC4H
0x001A = TC5H
0x001C = TC6H
0x001E = TC7H
MC9S12C-Family / MC9S12GC-Family
0
0
5
Bit 13
13
0
Rev 01.23
Bit 12
0
0
4
12
0
Description
Description
Chapter 15 Timer Module (TIM16B8CV1) Block Description
Bit 11
0
0
3
11
0
Bit 10
0
0
2
10
0
Bit 9
0
0
1
0
9
Bit 8
0
0
0
0
0
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