mc9s12c32mpb16 Freescale Semiconductor, Inc, mc9s12c32mpb16 Datasheet - Page 58

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mc9s12c32mpb16

Manufacturer Part Number
mc9s12c32mpb16
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 1 MC9S12C and MC9S12GC Device Overview (MC9S12C128)
1.4
The clock and reset generator provides the internal clock signals for the core and all peripheral modules.
Figure 1-14
Guide for details on clock generation.
1.5
Eight possible modes determine the device operating configuration. Each mode has an associated default
memory map and external bus configuration controlled by a further pin.
Three low power modes exist for the device.
1.5.1
The operating mode out of reset is determined by the states of the MODC, MODB, and MODA pins during
reset. The MODC, MODB, and MODA bits in the MODE register show the current operating mode and
provide limited mode switching during operation. The states of the MODC, MODB, and MODA pins are
latched into these bits on the rising edge of the reset signal. The ROMCTL signal allows the setting of the
ROMON bit in the MISC register thus controlling whether the internal Flash is visible in the memory map.
ROMON = 1 mean the Flash is visible in the memory map. The state of the ROMCTL pin is latched into
the ROMON bit in the MISC register on the rising edge of the reset signal.
58
System Clock Description
Modes of Operation
Chip Configuration Summary
shows the clock connections from the CRG to all modules. Consult the CRG Block User
EXTAL
XTAL
CRG
MC9S12C-Family / MC9S12GC-Family
Figure 1-14. Clock Connections
Bus Clock
Oscillator Clock
Rev 01.23
Core Clock
Not on 9S12GC
S12_CORE
MSCAN
VREG
Flash
RAM
ATD
TPM
TIM
PIM
SCI
SPI
Freescale Semiconductor

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