mc9s12c32mpb16 Freescale Semiconductor, Inc, mc9s12c32mpb16 Datasheet - Page 400

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mc9s12c32mpb16

Manufacturer Part Number
mc9s12c32mpb16
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 13 Serial Communications Interface (S12SCIV2) Block Description
13.4.4
13.4.4.1
The SCI receiver can accommodate either 8-bit or 9-bit data characters. The state of the M bit in SCI
control register 1 (SCICR1) determines the length of data characters. When receiving 9-bit data, bit R8 in
SCI data register high (SCIDRH) is the ninth bit (bit 8).
400
FROM TXD
RXD
LOOPS
RSRC
Receiver
Receiver Character Length
When queueing an idle character, return the TE bit to logic 1 before the stop
bit of the current frame shifts out through the Tx output signal. Setting TE
after the stop bit appears on Tx output signal causes data previously written
to the SCI data register to be lost. Toggle the TE bit for a queued idle
character while the TDRE flag is set and immediately before writing the
next byte to the SCI data register.
If the TE bit is clear and the transmission is complete, the SCI is not the
master of the TXD pin
RDRF/OR INTERRUPT REQUEST
CONTROL
IDLE INTERRUPT REQUEST
LOOP
CLOCK
SBR12–SBR0
BUS
BAUD DIVIDER
Figure 13-12. SCI Receiver Block Diagram
WAKE
RAF
RE
ILT
PE
PT
M
MC9S12C-Family / MC9S12GC-Family
RECOVERY
DATA
CHECKING
WAKEUP
PARITY
LOGIC
Rev 01.23
NOTE
NOTE
INTERNAL BUS
IDLE
ILIE
RIE
H
8
11-BIT RECEIVE SHIFT REGISTER
7
RDRF
SCI DATA REGISTER
OR
6
5
4
R8
FE
NF
PE
3
Freescale Semiconductor
2
1
0
L
RWU

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