mc9s12c32mpb16 Freescale Semiconductor, Inc, mc9s12c32mpb16 Datasheet - Page 648

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mc9s12c32mpb16

Manufacturer Part Number
mc9s12c32mpb16
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Appendix A Electrical Characteristics
A.2
This section describes the characteristics of the analog-to-digital converter.
V
bonded to the V
The ATD is specified and tested for both the 3.3V and 5V range. For ranges between 3.3V and 5V the ATD
accuracy is generally the same as in the 3.3V range but is not tested in this range in production test.
A.2.1
The
The following constraints exist to obtain full-scale, full range results: V
This constraint exists since the sample buffer amplifier can not drive beyond the power supply levels that
it ties to. If the input level goes outside of this range it will effectively be clipped.
1. Full accuracy is not guaranteed when differential voltage is less than 4.75V
2. The minimum time assumes a final sample period of 2 ATD clocks cycles while the maximum time assumes a final sample
648
Conditions are shown in
Num
RL
period of 16 ATD clocks.
1
2
3
4
5
5
6
Table A-10
is not available as a separate pin in the 48- and 52-pin versions. In this case the internal V
C
D
C
D
D
D
D
P
ATD Characteristics
ATD Operating Characteristics In 5V Range
Reference Potential
Differential Reference Voltage
ATD Clock Frequency
ATD 10-Bit Conversion Period
ATD 8-Bit Conversion Period
Recovery Time (V
Reference Supply current
SSA
shows conditions under which the ATD operates.
pin.
Table A-4
Conv, Time at 2.0MHz ATD Clock f
Conv, Time at 2.0MHz ATD Clock f
DDA
unless otherwise noted. Supply Voltage 5V-10% <= V
=5.0 Volts)
Rating
Table A-10. ATD Operating Characteristics
MC9S12C-Family / MC9S12GC-Family
(1)
Clock Cycles
Clock Cycles
Rev 01.23
ATDCLK
ATDCLK
High
Low
(2)
2
N
N
V
T
T
Symbol
f
ATDCLK
CONV10
CONV10
RH
CONV10
CONV10
t
V
I
V
REC
REF
RH
RL
-V
RL
V
SSA
V
4.75
Min
DDA/2
0.5
14
12
SSA
7
6
DDA
≤ V
<=5V+10%
RL
Typ
5.0
≤ V
Freescale Semiconductor
IN
≤ V
V
0.375
V
Max
5.25
DDA/2
2.0
28
14
26
13
20
DDA
RH
RL
≤ V
pad is
Cycles
Cycles
MHz
Unit
DDA
mA
µs
µs
µs
V
V
V
.

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