mc9s12c32mpb16 Freescale Semiconductor, Inc, mc9s12c32mpb16 Datasheet - Page 380

no-image

mc9s12c32mpb16

Manufacturer Part Number
mc9s12c32mpb16
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 12 Pulse-Width Modulator (PWM8B6CV1) Block Description
When using the 16-bit concatenated mode, the clock source is determined by the low-order 8-bit channel
clock select control bits. That is channel 5 when channels 4 and 5 are concatenated, channel 3 when
channels 2 and 3 are concatenated, and channel 1 when channels 0 and 1 are concatenated. The resulting
PWM is output to the pins of the corresponding low-order 8-bit channel as also shown in
The polarity of the resulting PWM output is controlled by the PPOLx bit of the corresponding low-order
8-bit channel as well.
After concatenated mode is enabled (CONxx bits set in PWMCTL register), enabling/disabling the
corresponding 16-bit PWM channel is controlled by the low-order PWMEx bit. In this case, the high-order
bytes PWMEx bits have no effect and their corresponding PWM output is disabled.
In concatenated mode, writes to the 16-bit counter by using a 16-bit access or writes to either the low or
high-order byte of the counter will reset the 16-bit counter. Reads of the 16-bit counter must be made by
16-bit access to maintain data coherency.
Either left aligned or center aligned output mode can be used in concatenated mode and is controlled by
the low-order CAEx bit. The high-order CAEx bit has no effect.
380
Clock Source 5
Clock Source 3
Clock Source 1
MC9S12C-Family / MC9S12GC-Family
Figure 12-40. PWM 16-Bit Mode
PWMCNT4
PWMCNT2
PWMCNT0
High
High
High
Period/Duty Compare
Period/Duty Compare
Period/Duty Compare
Rev 01.23
PWCNT5
PWCNT3
PWCNT1
Low
Low
Low
PWM5
PWM3
PWM1
Freescale Semiconductor
Figure
12-40.

Related parts for mc9s12c32mpb16