mc9s12c32mpb16 Freescale Semiconductor, Inc, mc9s12c32mpb16 Datasheet - Page 454

• Manufacturer Part Number: mc9s12c32mpb16
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 15 Timer Module (TIM16B8CV1) Block Description
For the description of PACLK please refer
If the pulse accumulator is disabled (PAEN = 0), the prescaler clock from the timer is always used as an
input clock to the timer counter. The change from one selected clock to the other happens immediately
after these bits are written.
15.3.2.16 Pulse Accumulator Flag Register (PAFLG)
Read: Anytime
Write: Anytime
When the TFFCA bit in the TSCR register is set, any access to the PACNT register will clear all the flags
in the PAFLG register.
454
Module Base + 0x0021
PAOVF
Reset
Field
PAIF
1
0
W
R
Pulse Accumulator Overflow Flag — Set when the 16-bit pulse accumulator overflows from 0xFFFF to 0x0000.
This bit is cleared automatically by a write to the PAFLG register with bit 1 set.
Pulse Accumulator Input edge Flag — Set when the selected edge is detected at the IOC7 input pin.In event
mode the event edge triggers PAIF and in gated time accumulation mode the trailing edge of the gate signal at
the IOC7 input pin triggers PAIF.
This bit is cleared by a write to the PAFLG register with bit 0 set.
Any access to the PACNT register will clear all the flags in this register when TFFCA bit in register TSCR(0x0006)
is set.
0
0
7
CLK1
Unimplemented or Reserved
0
0
1
1
Figure 15-25. Pulse Accumulator Flag Register (PAFLG)
0
0
6
CLK0
0
1
0
1
Table 15-20. PAFLG Field Descriptions
Table 15-19. Timer Clock Selection
MC9S12C-Family / MC9S12GC-Family
0
0
5
Use PACLK/65536 as timer counter clock frequency
Use PACLK/256 as timer counter clock frequency
Figure
Use timer prescaler clock as timer counter clock
Use PACLK as input to timer counter clock
Rev 01.23
15-24.
0
0
4
Description
Timer Clock
0
0
3
0
0
2
PAOVF
Freescale Semiconductor
0
1
PAIF
0
0