mt9074ap1 Zarlink Semiconductor, mt9074ap1 Datasheet - Page 49

• Manufacturer Part Number: mt9074ap1
• Description: T1/e1/j1 Single Chip Transceiver With Wide Dynamic Range Liu
• Manufacturer: Zarlink Semiconductor

MT9074
Data Sheet
Reframe
E1 Mode
The MT9074 will automatically force a reframe, if three consecutive frame alignment patterns or three
consecutive non-frame alignment bits are in error.
T1 Mode
The MT9074 will automatically force a reframe if the framing bit error density exceeds the threshold programmed by
control bits RS1-0 (Framing Mode Select Word page 1H, address 10H). RS1 = RS0 = 0 forces a reframe for 2
errors out of a sliding window of 4 framing bits. RS1 = 0, RS0 = 1 forces a reframe with 2 errors out of 5. RS1 = 1,
RS0 = 0 forces a reframe with 2 errors out of 6. RS1 = RS0 = 1 disables the automatic reframe.
In ESF mode, all framing bits are checked. In D4 mode either Ft bits only (if control bit 2 - FSI - of Framing Mode
Select Register is set low) or Ft and Fs bits are checked (FSI set high). If the D4 secondary yellow alarm is enabled
(control bit 1 - D4SECY of Transmit Alarm Control Word page 1H, address 11H) then the Fs bit of frame 12 is not
verified for the loss of frame circuit.
In E1 or T1 mode, receive transparent mode (selected when bit 3 page 1 address 12H is high) no reframing is
forced by the device.
The user may initiate a software reframe at any time by setting bit 1, page 1, address 10H high (ReFR). Once the
circuit has commenced reframing the signaling bits are frozen until multiframe synchronization has been achieved.
MT9074 Channel Signaling
Channel Signaling in T1 Mode
In T1 mode, when control bit RBEn (page 1H, address 14H) is low the MT9074 will insert ABCD or AB signaling bits
into bit 8 of every transmit DS0 channel every 6th frame. The AB or ABCD signaling bits from received frames 6
and 12 (AB) or from frames 6, 12, 18 and 24 (ABCD) will be loaded into an internal storage ram. The transmit AB/
ABCD signaling nibbles can be passed either via the micro-ports (for channels with bit 1 set high in the Per Time
Slot Control Word - pages 7H and 8H) or through related channels of the CSTi serial links, see “STBUS vs. DS1 to
Channel Relationship(T1)” on page 26. The receive signaling bits are always mapped to the equivalent ST-BUS
channels on CSTo. Memory pages five and six contain the transmit AB or ABCD nibbles and pages eight and nine
the receive AB or ABCD nibbles for micro-port CAS access.
The serial control streams that contain the transmit / receive signaling information (CSTi and CSTo respectively) are
clocked at 2.048 Mhz. The number of signaling bits to be transmit / received = 24 (timeslots) x 4 bits per timeslot
(ABCD) = 24 nibbles. This leaves many unused nibble positions in the 2.048 Mhz CSTi / CSTo bandwidth. These
unused nibble locations are tristated. The usage of the bit stream is as follows: the signaling bits are inserted /
reported in the same CSTi / CSTo channels that correspond to the DS1 channels used in DSTi / DSTo - see Table 6,
“STBUS vs. DS1 to Channel Relationship(T1),” on page 26. The control bit MSN (Signaling Control Word, page
01H, address 14H) allows for the ABCD bit to use the most significant nibble of CSTi / CSTo (MSN set high) or the
least significant nibble (MSN set low). Unused nibbles and timeslots are tristate. In order to facilitate multiplexing on
the CSTo control stream, an additional control bit CSToEn (Signaling Control Word, page 01H, address 14H) will
tristate the whole stream when set low. This control bit is forced low with the reset pin. In the case of D4 trunks, only
AB bits are reported. The control bits SM1-0 allow the user to program the 2 unused bits reported on CSTo in the
signaling nibble otherwise occupied by CD signaling bits in ESF trunks.
A receive signaling bit debounce of 6 msec. can be selected (DBEn set high - Signaling Control Word, page 01H,
address 14H). It should be noted that there may be as much as 3 msec. added to this duration because signaling
equipment state changes are not synchronous with the D4 or ESF multiframe.
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