mt9074ap1 Zarlink Semiconductor, mt9074ap1 Datasheet - Page 94

• Manufacturer Part Number: mt9074ap1
• Description: T1/e1/j1 Single Chip Transceiver With Wide Dynamic Range Liu
• Manufacturer: Zarlink Semiconductor

1- 0
Bit
7-4
Bit
Bit
7
6
5
4
3
2
0
TMA1-4
DSToEn
CSToEn
DBNCE,
X2, X3
TxCCS
Name
Name
X1
Y
Name
TIU0
Table 82 - Transmit Multiframe Alignment Signal (E1)
Table 83 - Interrupt and Signaling Control Word (E1)
Transmit Multiframe Alignment Bits One to Four. These bits are
transmitted on the PCM30 2048 kbit/sec. link in bit positions one to four of
time slot 16 of frame zero of every signaling multiframe. These bits are used
by the far end to identify specific frames of a signaling multiframe. TMA1-4 =
0000 for normal operation.
This bit is transmitted on the PCM30 2048 kbit/sec. link in bit position five of
time slot 16 of frame zero of every multiframe. X1 is normally set to one.
This bit is transmitted on the PCM30 2048 kbit/sec. link in bit position six of
time slot 16 of frame zero of every multiframe. It is used to indicate the loss of
multiframe alignment to the remote end of the link. If one - loss of multiframe
alignment; if zero - multiframe alignment acquired. This bit is ignored when
AUTY is zero (page 01H, address 10H).
These bits are transmitted on the PCM30 2048 kbit/sec. link in bit positions
seven and eight respectively, of time slot 16 of frame zero of every
multiframe. X2 and X3 are normally set to one. If receive channel 16 data is
to be included in the looped data then the control bit TxCCS (Page, Address
14H, bit 5) must be set high, otherwise transmit signaling data, or HOLCC
data will be placed into the outgoing channel 16 timeslot.
DSTo Enable. If zero pin DSTo is tristate. If set, the pin DSTo is enabled.
CSTo Enable. If zero pin CSTo is tristate. If set, the pin CSTo is enabled.
Transmit Common Channel Signaling. If one, the transmit section of the
device is in common channel signaling (CCS) mode. If zero, it is in Channel
Associated Signaling (CAS) mode.
Debounce Select. This bit selects the debounce period (1 for 14 msec.; 0
for no debounce). Note: there may be as much as 2 msec. added to this
duration because the state change of the signaling equipment is not
synchronous with the PCM30 signaling multiframe.
Table 81 - HDLC Selection Word (E1)
Transmit International Use Zero. When CRC-4 operation is disabled
(CSYN=1), this bit is transmit on the PCM30 2048 kbit/sec. link in bit
position one of time-slot zero of frame-alignment frames. It is reserved
for international use and should normally be kept at one. If CRC
processing is used, i.e., CSYN =0, this bit is ignored.
(Page 1, Address 13H)
(Page 1, Address 14H)
(Page 1, Address 12H)
Zarlink Semiconductor Inc.
MT9074
94
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Functional Description
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