mt9074ap1 Zarlink Semiconductor, mt9074ap1 Datasheet - Page 55

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mt9074ap1

Manufacturer Part Number
mt9074ap1
Description
T1/e1/j1 Single Chip Transceiver With Wide Dynamic Range Liu
Manufacturer
Zarlink Semiconductor
Datasheet

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Per Time Slot Control Word
Bit 7
T1 Mode
E1 Mode
Clear Channel Capability
In T1 mode, when bit zero (CC) in the per time slot control word is set no bit robbing for the purpose of signaling will
occur in this channel. This bit is not used in E1 mode.
Microport Signaling
When bit one (RPSIG) is set, the transmit signaling for the addressed channel can only be programmed by writing
to the transmit signaling page (pages 5H and 6H) via the microport. If zero, the transmit signaling information is
constantly updated with the information from the equivalent channel on CSTi.
Per Time Slot Looping
Any channel or combination of channels may be looped from transmit (sourced from DSTi) to receive (output on
DSTo) STBUS channels. When bit four (LTSL) in the Per Time Slot Control Word is set the data from the equivalent
transmit timeslot is looped back onto the equivalent receive channel.
Any channel or combination of channels may be looped from receive (sourced from the line data) to transmit
(output onto the line) channels. When bit five (RTSL) in the Per Time Slot Control Word is set the data from the
equivalent receive timeslot is looped back onto the equivalent transmit channel.
PRBS Testing
If the control bit ADSEQ is zero (from master control page 1 - access control word), any channel or combination of
transmit channels may be programmed to contain a generated pseudo random bit sequence (2
are selected by setting bit three (TTST), in the per time slot control word.
If the control bit ADSEQ is zero, any combination of receive channels may be connected to the PRBS decoder
(2
are selected by setting bit 2 (RRST) in the per time slot control word.
If PRBS is performed during a metallic or external looparound, per time slot control words with TTST set should
have RRST set as well.
Digital Milliwatt
If the control bit ADSEQ is one, a digital milliwatt sequence (Table 18) in T1 mode or (Table 19) in E1 mode may be
transmit on any combination of selected channels. The channels are selected by setting bit three (TTST), in the Per
Time Slot Control Word.
Under the same control condition (ADSEQ equal to one), the same digital milliwatt sequence is available to replace
received data on any combination of DSTo channels. This is accomplished by setting bit two (RRST) in the Per
Time Slot Control Word for the corresponding channel
TXMSG PCI
TXMSG
15
-1). Each error in the incoming sequence causes the PRBS error counter to increment. The receive channels
ADI
RTSL
RTSL
LTSL
LTSL
TTST
TTST
RRST
RRST
RPSIG
RPSIG
Bit 0
Zarlink Semiconductor Inc.
CC
MT9074
- - -
.
55
15
-1). The channels
Data Sheet

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