mt9074ap1 Zarlink Semiconductor, mt9074ap1 Datasheet - Page 88

• Manufacturer Part Number: mt9074ap1
• Description: T1/e1/j1 Single Chip Transceiver With Wide Dynamic Range Liu
• Manufacturer: Zarlink Semiconductor

NOTE: This table illustrates bit mapping on the serial input stream - it does not refer to an internal register.
Per Time Slot Control Words)(Pages 7 and 8) (T1)
The control functions described by Table 75 are repeated for each DS1 time slot. Page 7 addresses 10000 to
11111 correspond to DS1 time slot 1 to 16, while page 8 addresses 10000 to 10111 correspond to time slots 17
to 24. Table 74 illustrates the mapping between the addresses of these pages and the DS1 channel numbers.
7 - 4
3 - 0
Page 7 Address:
Equivalent DS1
channel
Page 8 Address:
Equivalent DS1
channel
Bit
Bit
7
6
5
Name
C(n),
C(n),
A(n),
A(n),
B(n),
B(n)
D(n)
D(n)
Transmit Signaling Bits for Channel n. When control bit MSN = 1 and RPSIG = 0 this nibble
is used. For ESF links these 4 bits are transmitted on the associated DS1 channel (see table 8)
in frames 6, 12, 18 and 24. For D4 links bits A are transmit on the associated DS1 channel of
frame 6 and bits B are transmit on the associated DS1 channel of frame 12. For D4 links bits C
and D are unused.
Transmit Signaling Bits for Channel n. When control bit MSN = 0 and RPSIG = 0 this nibble
is used. For ESF links these 4 bits are transmitted on the associated DS1 channel (see table 8)
in frames 6, 12, 18 and 24. For D4 links bits A are transmit on the associated Ds1 channel of
frame 6 and bits B are transmit on the associated DS1 channel of frame 12. For D4 links bits C
and D are unused.
TXMSG
Name
RTSL
PCI
Table 74 - Pages 7 and 8 Address Mapping to DS1 Channels
0
1
0
17
Table 73 - T1 / Transmit Channels Usage - CSTi
1
2
1
18
Table 75 - Per Time Slot Control Words
Transmit Message Mode. If high, the data contained in the Transmit
Message Register (address 18H, page 1) is transmitted in the corresponding
DS1 time slot. If zero, the data on DSTi is transmitted on the corresponding
DS1 time slot.
Per Channel Inversion. When set high the data for this channel sourced
from DSTi is inverted before being transmit onto the equivalent DS1 channel;
the data received from the incoming DS1 channel is inverted before it
emerges from DSTo.
Remote Time Slot Loopback. If one, the corresponding DS1 receive time
slot is looped to the corresponding DS1 transmit time slot. This received time
slot will also be present on DSTo. If zero, the loopback is disabled.
2
3
2
19
3
4
3
20
(Pages 7 and 8) (T1)
Zarlink Semiconductor Inc.
4
5
4
21
MT9074
Functional Description
88
5
6
5
22
6
7
6
23
Functional Description
7
8
7
24
8
9
8
x
9
10
9
x
10
11
10
x
11
12
11
x
12
13
12
x
13
14
13
x
Data Sheet
14
15
14
x
15
16
15
x