mt9074ap1 Zarlink Semiconductor, mt9074ap1 Datasheet - Page 50

• Manufacturer Part Number: mt9074ap1
• Description: T1/e1/j1 Single Chip Transceiver With Wide Dynamic Range Liu
• Manufacturer: Zarlink Semiconductor

If multi - frame synchronization is lost (page 3H, address 10H, bit 6 MFSYNC = 1) all receive signaling bits are
frozen. They will become unfrozen when multi - frame synchronization is acquired (this is the same as terminal
frame synchronization for ESF links).
When the SIGI interrupt is unmasked, IRQ will become active when a signaling state change is detected in any of
the 24 receive channels. The SIGI interrupt mask is located on page 1, address 1EH, bit 0 (set high to enable
interrupt); and the SIGI interrupt vector (page 4, address 12H) is 01H.
Channel Signaling in E1 Mode
In E1 mode,when control bit TxCCS is set to one, the MT9074 is in Common Channel Signaling (CCS) mode.
When TxCCS is low it is in Channel Associated Signaling mode (CAS). The CAS mode ABCD signaling nibbles can
be passed either via the micro-ports (when RPSIG = 1) or through related channels of the CSTo and CSTi serial
links (when RPSIG = 0). Memory page 09H and 0AH contains the receive ABCD nibbles and page 05H and 06H
the transmit ABCD nibbles for micro-port CAS access.
In CAS operation an ABCD signaling bit debounce of 14 msec. can be selected by writing a one to DBNCE control
bit. This is consistent with the signaling recognition time of ITU-T Q.422. It should be noted that there may be as
much as 2 msec. added to this duration because signaling equipment state changes are not synchronous with the
PCM30 multiframe.
If multiframe synchronization is lost (page 03H, address 10H, when MFSYNC = 1) all receive CAS signaling nibbles
are frozen. Receive CAS nibbles will become unfrozen when multiframe synchronization is acquired.
When the CAS signaling interrupt is unmasked (page 01H, address 1EH, SIGI=1), pin IRQ (pin 12 in PLCC, 85 in
MQFP) will become active when a signaling nibble state change is detected in any of the 30 receive channels.
In CCS mode, the data transmit on channel 16 is sourced from channel 16 data on DSTi.
Loopbacks
In order to meet PRI Layer 1 requirements and to assist in circuit fault sectioning, the MT9074 has six loopback
functions. These are as follows:
a) Digital loopback (DSTi to DSTo at the framer/LIU interface). Bit DLBK = 0 normal; DLBK = 1 activate.
b) Remote loopback (RTIP and RRING to TTIP and TRING respectively at the DS1 side). Bit RLBK = 0 normal;
RLBK = 1 activate.
System
System
DSTo
DSTo
DSTi
Zarlink Semiconductor Inc.
MT9074
MT9074
MT9074
50
Tx
Tx
Rx
DS1
DS1
Data Sheet