mt9074ap1 Zarlink Semiconductor, mt9074ap1 Datasheet - Page 78

• Manufacturer Part Number: mt9074ap1
• Description: T1/e1/j1 Single Chip Transceiver With Wide Dynamic Range Liu
• Manufacturer: Zarlink Semiconductor

7 - 3
7 - 0
7 - 3
2 - 0
1-0
Bit
Bit
Bit
2
RxBOM7 - 0
PD4 - PD0
RxBC2 - 0
RxTS4 - 0
Name
Name
LLOS
Name
- - -
Table 49 - Least Significant Phase Status Word
Table 50 - Receive Bit Oriented Message
Table 51 - Receive Signal Status Word
Receive Time Slot. A five bit counter that indicates the number of time
slots between the receive elastic buffer internal write frame boundary and
the ST-BUS read frame boundary. The count is updated every 250 uS.
Receive Bit Count. A three bit counter that indicates the number of
STBUS bit times there are between the receive elastic buffer internal write
frame boundary and the ST-BUS read frame boundary. The count is
updated every 250 uS.
Received Bit Oriented Message. This register contains the eight least
significant bits of the ESF bit oriented message codeword. The contents of
this register is updated when a new bit - oriented message codeword has
been detected in 8 out of the last ten codeword positions.
Peak Detector Voltage Levels. These five bits indicate the level of the
received signal AMI pulses.
PD4
0
0
0
0
1
LIU Loss of Signal indication. This bit will be high when the received
signal is less than 40 dB below the nominal value for a period of at least 1
msec. This bit will be low for normal operation.
Unused
(Page 3, Address 16H) (T1)
(Page 3, Address 14H) (T1)
(Page 3, Address 15H) (T1)
PD3
0
0
0
1
0
Zarlink Semiconductor Inc.
PD2 PD1 PD0
0
0
1
0
0
MT9074
0
1
0
0
0
78
1
0
0
0
0
Line Attenuation
less than 4dB
3-8dB
8-14dB
14-20dB
more than 20dB
Functional Description
Functional Description
Functional Description
Data Sheet