mt9074ap1 Zarlink Semiconductor, mt9074ap1 Datasheet - Page 73
mt9074ap1
Manufacturer Part Number
mt9074ap1
Description
T1/e1/j1 Single Chip Transceiver With Wide Dynamic Range Liu
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT9074AP1.pdf
(151 pages)
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6-5
3-2
Bit
6-4
2-0
Bit
7
4
1
0
7
3
Name
RSV
RSV
CPL
RSV
ADSEQ
Name
LIUEn
T1/E1
RSV
RSV
RSV
Table 38 - Configuration Control Word
Table 39 - Custom Tx Pulse Enable
Reserved. Must be kept high for normal operation.
Reserved. Must be kept low for normal operation.
Custom Pulse Level. Setting this bit low enables the internal ROM
values in generating the transmit pulses. The ROM is coded for different
line terminations or build out, as specified in the LIU Control word. Setting
this bit high disables the pre-programmed pulse templates. Each of the 4
phases that generate a mark derive their D/A coefficients from the values
programmed in the CPW registers.
Reserved. Must be kept at 0 for normal operation.
(Page 2, Address 11H) (T1)
(Page 2, Address 10H) (T1)
Zarlink Semiconductor Inc.
T1/E1 Mode Selection. when this bit is zero, the device is in T1
mode. When set high, the device is in E1 mode.
Reserved. Must be kept at 0 for normal operation.
LIU Enable. Setting this bit low enables the internal LIU front-end.
Setting this pin high disables the LIU. Digital inputs RXA and RXB
are sampled by the rising edge of E1.5i (C1.50) to strobe in the
received line data. Digital transmit data is clocked out of pins TXA
and TXB with the rising edge of C1.5o
Reserved. Must be kept at 0 for normal operation.
Digital Milliwatt or Digital Test Sequence. If one, the Alaw
digital milliwatt analog test sequence will be selected for those
channels with per time slot control bits TTST, RRST set. If zero, a
PRBS generator / detector will be connected to channels with
TTST, RRST respectively.
Reserved. Must be kept at 0 for normal operation.
MT9074
73
Functional Description
Functional Description
Data Sheet
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