mt9074ap1 Zarlink Semiconductor, mt9074ap1 Datasheet - Page 51
mt9074ap1
Manufacturer Part Number
mt9074ap1
Description
T1/e1/j1 Single Chip Transceiver With Wide Dynamic Range Liu
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT9074AP1.pdf
(151 pages)
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c) ST-BUS loopback (DSTi to DSTo at the system side). Bit SLBK = 0 normal; SLBK = 1 activate.
d) Payload loopback (RTIP and RRING to TTIP and TRING respectively at the system side). Bit PLBK = 0
normal; PLBK = 1 activate. The payload loopback is effectively a physical connection of DSTo to DSTi within the
MT9074. Sbit information and the DL originate at the point of loopback.
e) Metallic Loopback. MLBK = 0 normal; MLBK = 1 activate, will isolate the external signals RTIP and RRING
from the receiver and internally connect the analog output TTIP and TRING to the receiver analog input.
f) Local and remote time slot loopback. Remote time slot loopback control bit RTSL = 0 normal; RTSL = 1
activate, will loop around transmit ST-BUS time slots to the DSTo stream. Local time slot loopback bits LTSL = 0
normal; LTSL = 1 activate, will loop around receive PCM30 time slots towards the remote PCM30 end.
The digital, remote, ST-BUS, payload and metallic loopbacks are located on page 1, address 15H - Coding and
Loopback Control Word. The remote and local time slot loopbacks are controlled through control bits 5 and 4 of
the Per Time Slot Control Words, pages 7H and 8H. Local and remote timeslot loopbacks cannot be present at
the same time.
Performance Monitoring
Error Counters
In T1 mode, MT9074 has eight error counters, which can be used for maintenance testing, an ongoing measure of
the quality of a DS1 link and to assist the designer in meeting specifications such as TR62411 and T1.403. All
counters can be preset or cleared by writing to the appropriate locations.
System
System
System
System
DSTo
DSTo
DSTo
DSTo
DSTi
DSTi
DSTi
DSTi
Zarlink Semiconductor Inc.
MT9074
MT9074
MT9074
MT9074
MT9074
51
Tx
Rx
Tx
Rx
Tx
Tx
Rx
DS1
DS1
DS1
DS1
Data Sheet
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