mt9074ap1 Zarlink Semiconductor, mt9074ap1 Datasheet - Page 65

• Manufacturer Part Number: mt9074ap1
• Description: T1/e1/j1 Single Chip Transceiver With Wide Dynamic Range Liu
• Manufacturer: Zarlink Semiconductor

2-1
Bit
Bit
0
7
6
5
4
3
2
1
0
Table 26 - Coding and Loopback Control Word (T1)(Page 1, Address 15H)
RxB8ZS
TxB8ZS
SM1-0
Name
JYEL
Name
MLBK
DLBK
RLBK
SLBK
PLBK
FBS
Table 25 - Signaling Control Word (T1)
Signaling Message. These two bits are used to fill the vacant bit positions
available on CSTo when the MT9074 is operating on a D4 trunk. The first
two bits of each reporting nibble of CSTo contain the AB signaling bits. The
last two contain SM1 and SM0 (in that order). When the MT9074 is
connected to ESF trunks four signaling bits (ABCD) are reported and bits
SM1-0 become unused.
Japan Yellow Alarm. Set this bit high to select a pattern of 16 ones
(1111111111111111) as the ESF yellow alarm, both for the case when
and ESF yellow alarm is to be transmitted or in recognizing a received
yellow alarm.
Receive B8ZS Enable. If one, receive B8ZS decoding is enabled.
Metallic Loopback. If one, then RRTIP/RRING are connected directly to
TTIP and TRING respectively. If zero, this feature is disabled. Set the
transmit line build out to -7.5 dB when metallic loopback is enabled.
Transmit B8ZS Enable. If one, all zero octets are substituted with B8ZS
codes.
Forced Bit Stuffing. If set any transmit DS0 channel containing all zeros
has bit 7 forced high.
Digital Loopback. If one, the digital stream to the transmit LIU is looped
back in place of the digital output of the receive LIU. Data coming out of
DSTo will be a delayed version of DSTi. If zero, this feature is disabled.
Remote Loopback. If one, all time slots received on RRTIP/RRING are
connected to TTIP/TRING on the DS1 side of the MT9074. If zero, this
feature is disabled.
ST-BUS Loopback. If one, all time slots of DSTi are connected to DSTo on
the ST-BUS side of the MT9074. If zero, this feature is disabled. See
Loopbacks section.
Payload Loopback. If one, all time slots received on RTIP/RRING are
connected to TTIP/TRING on the ST-BUS side of the MT9074. If zero, this
feature is disabled. If receive robbed bit signaling data is to be included in
the looped data, then the control bit RBEn (Page 1 Address 14H, Bit 5)
must be set low, otherwise transmit signaling data will be placed into the
LSB of each timeslot every sixth frame. Setting all Clear Channel control
bits high (Bit 0 in the Per Time Slot Control words - Pages 7 and 8 Address
10H to IFH inclusive) has the same effect as setting control bit RBEn low.
(Page 1, Address 14H)
Zarlink Semiconductor Inc.
MT9074
65
Functional Description
Functional Description
Data Sheet