mt9074ap1 Zarlink Semiconductor, mt9074ap1 Datasheet - Page 89
mt9074ap1
Manufacturer Part Number
mt9074ap1
Description
T1/e1/j1 Single Chip Transceiver With Wide Dynamic Range Liu
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT9074AP1.pdf
(151 pages)
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Per Channel Receive Signaling (T1 and E1 mode) (Pages 9 and 0AH)
Page 09H, addresses 10000 to 11111, and page 1AH addresses 10000 to 10111 contain the Receive Signaling
Control Words for DS1 channels 1 to 16 and 17 to 24 respectively. Table 76 illustrates the mapping between the
addresses of these pages and the DS1 channel numbers. Table 77 describes bit allocation within each of these
registers.
Page 9 Address:
Equivalent DS1
channel
Page A Address:
Equivalent DS1
channel
Bit
4
3
2
1
0
RPSIG
Name
TTST
RTST
LTSL
CC
Table 76 - Page 9, A Address Mapping to DS1 Channels (T1)
0
1
0
17
1
2
1
18
Table 75 - Per Time Slot Control Words
Local Time Slot Loopback. If one, the corresponding transmit time slot is
looped to the corresponding receive time slot. This transmit time slot will also
be present on the transmit DS1 stream. If zero, this loopback is disabled.
Transmit Test. If one, a test signal, either digital milliwatt (when control bit
ADSEQ is one) or PRBS (Z
corresponding DS1 time slot. More than one time slot may be activated at
once. If zero, the test signal will not be connected to the corresponding time
slot.
Receive Test. If one, the corresponding DSTo time slot will be used for
testing. If control bit ADSEQ is one, a digital milliwatt signal will be
transmitted into the DSTo channel. If ADSEQ is zero, the receive channel
will be connected to the PRBS (2
Serial Signaling Enable. If set low, the transmit signaling buffer for the
equivalent DS1 channel will be sourced from the ST-BUS channel on CSTi
associated with it. If set high the transmit signaling RAM must be
programmed via the microport.
Clear Channel. When set high no robbed bit signaling is inserted in the
equivalent transmit DS1 channel. When set low robbed bit signaling is
included in every 6th channel.
2
3
2
19
3
4
3
20
(Pages 7 and 8) (T1)
Zarlink Semiconductor Inc.
4
5
4
21
MT9074
89
5
6
5
22
6
7
6
23
Functional Description
15
-1) (ADSEQ is zero), will be transmitted in the
24
7
8
7
15
- 1) detector.
8
9
8
x
9
10
9
x
10
11
10
x
11
12
11
x
12
13
12
x
13
14
13
x
Data Sheet
14
15
14
x
15
16
15
x
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