gwixp465bad ETC-unknow, gwixp465bad Datasheet - Page 125

• Manufacturer Part Number: gwixp465bad
• Description: Network Proc 1.3v/1.4v/2.5v/3.3v 400mhz 544-pin Bga
• Manufacturer: ETC-unknow

Datasheet—Intel
Table 64.
5.6.2.7
5.6.2.7.1
Figure 32.
August 2006
Document Number:
DDRI SDRAM Read Timing Values
Expansion Bus
Expansion Bus Synchronous Operation
Expansion Bus Synchronous Timing
®
Notes:
1.
Symbol
306261-004US
IXP45X and Intel
T
T
T
T
T
T
1
2
3
4
5
6
It is recommended that IBIS models be used to verify signal integrity on individual designs
EX_DATA, _BE_N, PARITY -
EX_DATA, _BE_N, PARITY -
DDRI_RCVENOUT_N minimum output valid time
after DDRI_M_CLK
DDRI_RCVENOUT_N maximum output valid
time after DDRI_M_CLK
DDRI_RCVENIN_N input valid time before
DDRI_DQS
DDRI_RCVENIN_N hold time from DDRI_DQS
valid
Maximum delay for Data valid after any edge of
DDRI_DQS. Both of these signal are inputs from
the memory during read operations.
Maximum guaranteed time before data begins
to transition to the next valid data prior to any
DDRI_DQS clock edge. Both of these signal are
inputs from the memory during read operations.
This time in conjunction with timing parameter
T
signals can operate with the memory controller
on the IXP45X/IXP46X network processors.
5
specify the window for which the DDRI data
EX_ control signals -
EX_ control signals -
output_signals
input_signals
output_signals
input_signals
®
IXP46X Product Line of Network Processors
EX_CLK
Parameter
Intel
®
IXP45X and Intel
T
T
3
5
®
Min.
-0.1
0.9
3.6
IXP46X Product Line of Network Processors
T
T
4
6
T
2
T
1
Max.
0.75
2.7
1.0
Units
ns
ns
ns
ns
ns
ns
Datasheet
1
1
Notes
125