gwixp465bad ETC-unknow, gwixp465bad Datasheet - Page 47

• Manufacturer Part Number: gwixp465bad
• Description: Network Proc 1.3v/1.4v/2.5v/3.3v 400mhz 544-pin Bga
• Manufacturer: ETC-unknow

Package Information
Table 11.
August 2006
47
PCI_PAR
PCI_FRAME_N
PCI_TRDY_N
PCI_IRDY_N
PCI_STOP_N
Note:
†
Name
This table discusses all features supported on the Intel
see
For a legend of the Type codes, see
Table 1 on page
PCI Controller (Sheet 2 of 4)
Power
Reset
on
Z
Z
Z
Z
Z
†
13.
Reset
Z
Z
Z
Z
Z
†
Software
Enables
Normal
Table 8 on page
Reset
After
Until
VB
VB
VB
VB
VB
Software
Configur
Possible
Enables
ations
After
VB
VB
VB
VB
VB
43.
®
IXP45X and Intel
Type
I/O
I/O
I/O
I/O
I/O
†
PCI Parity used to check parity across the 32 bits of PCI_AD and the four bits of PCI_CBE_N.
When this interface/signal is enabled and is not being used in a system design, the interface/signal
should be pulled high with a 10-KΩ resistor. When this interface is disabled via the PCI soft fuse
(refer to Expansion Bus Controller chapter of the Intel
Network Processors Developer’s Manual) and is not being used in a system design, this interface/
signal is not required for any connection.
PCI Cycle Frame used to signify the beginning and duration of a transaction. The signal will be
inactive prior to or during the final data phase of a given transaction.
When this interface/signal is enabled and is not being used in a system design, the interface/signal
should be pulled high with a 10-KΩ resistor. When this interface is disabled via the PCI soft fuse
(refer to Expansion Bus Controller chapter of the Intel
Network Processors Developer’s Manual) and is not being used in a system design, this interface/
signal is not required for any connection.
PCI Target Ready informs that the target of the PCI bus is ready to complete the current data phase
of a given transaction.
When this interface/signal is enabled and is not being used in a system design, the interface/signal
should be pulled high with a 10-KΩ resistor. When this interface is disabled via the PCI soft fuse
(refer to Expansion Bus Controller chapter of the Intel
Network Processors Developer’s Manual) and is not being used in a system design, this interface/
signal is not required for any connection.
PCI Initiator Ready informs the PCI bus that the initiator is ready to complete the transaction.
When this interface/signal is enabled and is not being used in a system design, the interface/signal
should be pulled high with a 10-KΩ resistor. When this interface is disabled via the PCI soft fuse
(refer to Expansion Bus Controller chapter of the Intel
Network Processors Developer’s Manual) and is not being used in a system design, this interface/
signal is not required for any connection.
PCI Stop indicates that the current target is requesting the current initiator to stop the current
transaction.
When this interface/signal is enabled and is not being used in a system design, the interface/signal
should be pulled high with a 10-KΩ resistor. When this interface is disabled via the PCI soft fuse
(refer to Expansion Bus Controller chapter of the Intel
Network Processors Developer’s Manual) and is not being used in a system design, this interface/
signal is not required for any connection.
®
IXP46X Product Line of Network Processors. For details on feature support listed by processor,
Intel
®
IXP45X and Intel
Description
®
IXP46X Product Line of Network Processors Datasheet
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®
IXP45X and Intel
IXP45X and Intel
IXP45X and Intel
IXP45X and Intel
IXP45X and Intel
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IXP46X Product Line of
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