gwixp465bad ETC-unknow, gwixp465bad Datasheet - Page 56

• Manufacturer Part Number: gwixp465bad
• Description: Network Proc 1.3v/1.4v/2.5v/3.3v 400mhz 544-pin Bga
• Manufacturer: ETC-unknow

Package Information
Table 14.
August 2006
56
UTP_IP_FCI
UTP_IP_SOC
UTP_IP_DATA[3:0] /
ETHA_RXDATA[3:0]
Note:
†
††
Name
This table discusses all features supported on the Intel
see
For a legend of the Type codes, see
For information on selecting the desired interface, see the Intel
Table 1 on page
UTOPIA Level 2/MII_A/ SMII Interface (Sheet 4 of 7)
Reset
Power
on
Z
Z
Z
13.
†
Reset
VI
VI
VI
†
Table 8 on page
Software
Enables
Normal
Reset
After
Until
VI
VI
VI
Software
Configur
Possible
Enables
ations
After
43.
®
VI
VI
VI
IXP45X and Intel
®
Type
IXP45X and Intel
I
I
I
†
UTOPIA Input Data flow control input signal. Also known as RXEMPTY/CLAV.
Used to inform the processor of the ability of each polled PHY to send a complete cell. For cell-
level flow control in an MPHY environment, RxClav is an active high tri-stateable signal from the
MPHY to ATM layer. The UTP_IP_FCI, which is connected to multiple MPHY devices, will see logic
high generated by the PHY, one clock after the given PHY address is asserted, when a full cell can
be received by the PHY. The UTP_IP_FCI will see a logic low generated by the PHY, one clock cycle
after the PHY address is asserted if a full cell cannot be received by the PHY.
In SPHY mode, this signal is used to indicate to the processor that the PHY has an octet or cell
available to be transferred to the processor.
When this interface/signal is enabled and is not being used in a system design, the interface/
signal should be pulled high with a 10-KΩ resistor. When this interface is disabled via the UTOPIA
and/or the NPE-A Ethernet soft fuse (refer to Expansion Bus Controller chapter of the Intel
IXP45X and Intel
being used in a system design, this interface/signal is not required for any connection.
Start of Cell. RX_SOC
Active-high signal that is asserted when UTP_IP_DATA contains the first valid byte of a
transmitted cell.
When this interface/signal is enabled and is not being used in a system design, the interface/
signal should be pulled high with a 10-KΩ resistor. When this interface is disabled via the UTOPIA
and/or the NPE-A Ethernet soft fuse (refer to Expansion Bus Controller chapter of the Intel
IXP45X and Intel
being used in a system design, this interface/signal is not required for any connection.
UTOPIA Mode of Operation:
UTOPIA input data. Also known as RX_DATA.
Used by to the processor to receive data from an ATM UTOPIA Level 2-compliant PHY.
MII Mode of Operation:
Receive data bus from the PHY, asserted synchronously with respect to ETHA_RXCLK.
SMII mode of operation:
Not used.
When this interface/signal is enabled and is not being used in a system design, the interface/
signal should be pulled high with a 10-KΩ resistor. When this interface is disabled via the UTOPIA
and/or the NPE-A Ethernet soft fuse (refer to Expansion Bus Controller chapter of the Intel
IXP45X and Intel
being used in a system design, this interface/signal is not required for any connection.
®
IXP46X Product Line of Network Processors. For details on feature support listed by processor,
®
IXP46X Product Line of Network Processors Developer’s Manual.
®
®
®
Intel
IXP46X Product Line of Network Processors Developer’s Manual) and is not
IXP46X Product Line of Network Processors Developer’s Manual) and is not
IXP46X Product Line of Network Processors Developer’s Manual) and is not
®
IXP45X and Intel
®
Description
IXP46X Product Line of Network Processors Datasheet
Document Number:
306261-004US
®
®
®