gwixp465bad ETC-unknow, gwixp465bad Datasheet - Page 46

• Manufacturer Part Number: gwixp465bad
• Description: Network Proc 1.3v/1.4v/2.5v/3.3v 400mhz 544-pin Bga
• Manufacturer: ETC-unknow

Package Information
Table 10.
Table 11.
August 2006
46
DDRI_RCVENOUT_N
DDRI_RCVENIN_N
DDRI_RCOMP
DDRI_VREF
Note:
†
PCI_AD[31:0]
PCI_CBE_N[3:0]
Note:
†
Name
This table discusses all features supported on the Intel
see
For a legend of the Type codes, see
This table discusses all features supported on the Intel
see
For a legend of the Type codes, see
Name
Table 1 on page
Table 1 on page
DDR SDRAM Interface (Sheet 2 of 2)
PCI Controller (Sheet 1 of 4)
Power
Reset
on
Z
Z
VCCM/2
Reset
Tied off
resistor
Power
†
to a
13.
13.
on
Z
Z
Reset
†
Z
Z
VCCM/2
Tied off
resistor
Reset
†
to a
VI
1
Software
†
Enables
Normal
Table 8 on page
Table 8 on page
Reset
After
Until
VB
VB
Software
Tied off to
a resistor
Enables
Normal
VCCM/2
Reset
After
Until
VO
VI
Software
Configur
Possible
Enables
ations
After
VB
VB
Software
Tied off to
Configur
43.
43.
Possible
a resistor
Enables
®
VCCM/2
®
ations
After
IXP45X and Intel
IXP45X and Intel
VO
VI
Type
I/O
I/O
Type
†
O
O
I
I
PCI Address/Data bus used to transfer address and bidirectional data to and from multiple PCI
devices.
When this interface/signal is enabled and is not being used in a system design, the interface/signal
should be pulled high with a 10-KΩ resistor. When this interface is disabled via the PCI soft fuse
(refer to Expansion Bus Controller chapter of the Intel
Network Processors Developer’s Manual) and is not being used in a system design, this interface/
signal is not required for any connection.
PCI Command/Byte Enables is used as a command word during PCI address cycles and as byte
enables for data cycles.
When this interface/signal is enabled and is not being used in a system design, the interface/signal
should be pulled high with a 10-KΩ resistor. When this interface is disabled via the PCI soft fuse
(refer to Expansion Bus Controller chapter of the Intel
Network Processors Developer’s Manual) and is not being used in a system design, this interface/
signal is not required for any connection.
†
®
®
RECEIVE ENABLE OUT must be connected to DDRI_RCVENIN_N signal of the IXP45X/IXP46X
network processors and the propagation delay of the trace length must be matched to the
clock trace plus the average DQ Traces.
RECEIVE ENABLE IN provides delay information for enabling the input receivers and must be
connected to the DDRI_RCVENOUT_N signal of the IXP45X/IXP46X network processors.
20 Ohm 1% tolerance Resistor connected to ground used for process/temperature
adjustments.
DDR SDRAM Voltage Reference — is used to supply the reference voltage to the differential
inputs of the memory controller pins.
IXP46X Product Line of Network Processors. For details on feature support listed by processor,
IXP46X Product Line of Network Processors. For details on feature support listed by processor,
Intel
®
IXP45X and Intel
Description
®
Description
IXP46X Product Line of Network Processors Datasheet
®
®
IXP45X and Intel
IXP45X and Intel
Document Number:
®
®
IXP46X Product Line of
IXP46X Product Line of
306261-004US