gwixp465bad ETC-unknow, gwixp465bad Datasheet - Page 130

• Manufacturer Part Number: gwixp465bad
• Description: Network Proc 1.3v/1.4v/2.5v/3.3v 400mhz 544-pin Bga
• Manufacturer: ETC-unknow

Table 68.
Figure 36.
Intel
Datasheet
130
®
IXP45X and Intel
Motorola* Multiplexed Mode Values (Sheet 2 of 2)
Motorola* Simplex Mode
(exp_mot_ds_n)
(exp_mot_ds_n)
Symbol
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
(exp_mot_rnw)
(exp_mot_rnw)
T
T
EX_ADDR
EX_WR_N
ale2valcs
T
EX_CS_N
EX_WR_N
T
rdsetup
EX_RD_N
EX_RD_N
®
EX_DATA
EX_DATA
rdhold
recov
EX_CLK
IXP46X Product Line of Network Processors
The EX_ALE signal is extended form T to 4T nnsec, based on the programming of the T1 timing
parameter. The parameter Tale2addrhold is fixed at T.
Setting the address phase parameter (T1) will adjust the duration that the address appears to the
external device.
Setting the data setup phase parameter (T2) will adjust the duration that the data appears prior to a
data strobe (read or write) to an external device.
Setting the data strobe phase parameter (T3) will adjust the duration that the data strobe appears
(read or write) to an external device. Data will be available during this time as well.
Setting the data hold strobe phase parameter (T4) will adjust the duration that the chip selects,
address, and data (during a write) will be held.
Setting the recovery phase parameter (T5) will adjust the duration between successive accesses on
the expansion interface.
T is the period of the clock measured in ns.
Clock to output delay for all signals will be a maximum of 15 ns for devices requiring operation in
synchronous mode.
Timing was designed for a system load between 5pF and 60pF for high drive setting
Parameter
Valid chip select after the falling edge of ALE
Data valid required before the rising edge of
EXP_MOT_DS_N
Data hold required after the rising edge of EXP_MOT_DS_N
Time needed between successive accesses on expansion
interface.
Intel
®
IXP45X and Intel
T ad2valcs
1-4 Cycles
T1
®
T dval2valds
IXP46X Product Line of Network Processors—Datasheet
1-4 Cycles
T2
Valid Address
1-16 Cycles
Output Data
T dspulse
T rdsetup
T3
Input Data
T dhold2afterds
1-4 Cycles
T4
Document Number:
Min.
14.7
T rdhold
1
2
1
Max.
1-16 Cycles
T recov
16
4
T5
Units
Cycles
Cycles
ns
ns
306261-004US
August 2006
A9588-01
Notes
7
6