gwixp465bad ETC-unknow, gwixp465bad Datasheet - Page 146

• Manufacturer Part Number: gwixp465bad
• Description: Network Proc 1.3v/1.4v/2.5v/3.3v 400mhz 544-pin Bga
• Manufacturer: ETC-unknow

5.6.3.4
Figure 49.
Table 81.
Intel
Datasheet
146
T
T
T
T
T
T
Notes:
1.
2.
RELEASE_PWRON_RST_N
RELEASE_RESET_IN_N
PLL_LOCK
EX_ADDR_SETUP
EX_ADDR_HOLD
WARM_RESET
EX_ADDR[24:0]-Pull Up/Down
®
IXP45X and Intel
PWRON_RESET_N
Symbol
EX_ADDR[24:0]
T
The expansion bus address is captured as a derivative of the RESET_IN_N signal going high. When a programmable-logic
device is used to drive the EX_ADDR signals instead of pull-downs, the signals must be active until PLL_LOCK is active.
RESET_IN_N
RELEASE_PWRON_RST_N
PLL_LOCK
V
V
V
CCM
CCP
CC
Reset Timings
Reset Timings
Reset Timings Table Parameters
®
Minimum time required to hold the PWON_RST_N at logic 0
state after stable power has been applied to the IXP45X/
IXP46X network processors.
Minimum time required to hold the RESET_IN_N at logic 0
state after PWRON_RST_N has been released to a logic 1
state. The RESET_IN_N signal must be held low when the
PWRON_RST_N signal is held low.
Maximum time for PLL_LOCK signal to drive to logic 1 after
RESET_IN_N is driven to logic 1 state. The boot sequence
does not occur until this period is complete.
Minimum time for the EX_ADDR signals to drive the inputs
prior to RESET_IN_N being driven to logic 1 state. This is
used for sampling configuration information.
Minimum/maximum time for the EX_ADDR signals to drive
the inputs prior to PLL_LOCK being driven to logic 1 state.
This is used for sampling configuration information.
Minimum time required to drive RESET_IN_N signal to logic
0 in order to cause a Warm Reset in the IXP45X/IXP46X
network processors. During this period, the power supply
must not be disturbed and PWRON_RST_N signal must
remain at logic high during the entire process.
IXP46X Product Line of Network Processors
is the time required for the internal oscillator to reach stability.
Intel
®
IXP45X and Intel
T
RELEASE_PWRON_RST_N
Parameter
T
EX_ADDR_SETUP
CFG Settings To Be Captured
CFG Settings To Be Captured
®
IXP46X Product Line of Network Processors—Datasheet
T
RELEASE_RST_N
T
2000
Min.
500
10
50
PLL_LOCK
0
Document Number:
Typ.
T
EX_ADDR_HOLD
IXP46X Drives Outputs
Max.
10
20
Units
ns
ns
µs
ns
ns
ns
306261-004US
August 2006
Note
1
2
2