gwixp465bad ETC-unknow, gwixp465bad Datasheet - Page 19

• Manufacturer Part Number: gwixp465bad
• Description: Network Proc 1.3v/1.4v/2.5v/3.3v 400mhz 544-pin Bga
• Manufacturer: ETC-unknow

Datasheet—Intel
Note:
3.1.2
August 2006
Document Number:
The NPE is a hardware-multi-threaded processor engine that is used to accelerate
functions that are difficult to achieve high performance in a standard RISC processor.
Each NPE is a 133.32-MHz (which is 4 * OSC_IN input pin) processor core that has self-
contained instruction memory and self-contained data memory that operate in parallel.
Each NPE has 4 K words of instruction memory and 4 K words of data memory.
In addition to having separate instruction/data memory and local-code store, the NPE
supports hardware multi-threading with support for multiple contexts. The support of
hardware multi-threading creates an efficient processor engine with minimal processor
stalls due to the ability of the processor to switch contexts in a single clock cycle, based
on a prioritized/preemptive basis. The prioritized/preemptive nature of the context
switching allows time-critical applications to be implemented in a low-latency fashion —
which is required when processing multi-media applications.
The NPE also connects to several hardware-based coprocessors that are used to
implement functions that are difficult for a processor to implement. These functions
include:
To determine if the SHA-256/384/512 feature is enabled by a particular software
release, see the Intel
These coprocessors are implemented in hardware, enabling the coprocessors and the
NPE processor core to operate in parallel.
With the addition of the new switching coprocessor (SWCP) and the Ethernet
coprocessors enabled with the Intel
Layer-2 switch can be easily implemented using all Intel-based silicon. Also, by using
NPEs to implement switching functions, value added features like VLAN or IP switching
can be easily upgraded using existing silicon. Therefore, speeding up the end
customer’s time to market while keeping product costs the same.
The combined forces of the hardware multi-threading, local-code store, independent
instruction memory, independent data memory, and parallel processing — contained on
the NPE — allows the Intel XScale
The multi-processing capability of the peripheral interface functions allows unparalleled
performance to be achieved by the application running on the Intel XScale
Internal Bus
The internal bus architecture of the IXP45X/IXP46X network processors are designed to
allow parallel processing to occur and to isolate bus utilization, based on particular
traffic patterns. The bus is segmented into four major buses:
®
306261-004US
IXP45X and Intel
• HSS Serialization/ De-serialization
• DES/3DES/AES
• MD-5
• Learning/filtering content addressable
• UTOPIA Level 2 Framing
• North Advanced, High-Performance Bus
• South AHB
memory
(AHB)
®
IXP46X Product Line of Network Processors
®
IXP400 Software Programmer’s Guide.
Intel
®
®
processor to be utilized for application purposes.
®
IXP400 Software, functions like a four-port,
IXP45X and Intel
• CRC checking/generation
• SHA-1/256/384/512
• HDLC bit stuffing/de-stuffing
• Media Access Controller
• Memory Port Interface
• Advanced Peripheral Bus
functionality
®
(APB)
IXP46X Product Line of Network Processors
®
processor.
Datasheet
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