gwixp465bad ETC-unknow, gwixp465bad Datasheet - Page 131

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gwixp465bad

Manufacturer Part Number
gwixp465bad
Description
Network Proc 1.3v/1.4v/2.5v/3.3v 400mhz 544-pin Bga
Manufacturer
ETC-unknow
Datasheet
Datasheet—Intel
Table 69.
Figure 37.
August 2006
Document Number:
Motorola* Simplex Mode Values
HPI*–8 Mode Write Accesses
®
Symbol
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
306261-004US
IXP45X and Intel
T
T
dholdafterds
T
dval2valds
T
T
T
EX_ADDR[2:1]
ad2valcs
T
rdsetup
dspulse
rdhold
recov
EX_ADDR[0]
EX_RDY_N
EX_W R_N
EX_ALE is not valid in simplex mode of operation.
Setting the address phase parameter (T1) will adjust the duration that the address appears to the
external device.
Setting the data setup phase parameter (T2) will adjust the duration that the data appears prior to a
data strobe (read or write) to an external device.
Setting the data strobe phase parameter (T3) will adjust the duration that the data strobe appears
(read or write) to an external device. Data will be available during this time as well.
Setting the data hold strobe phase parameter (T4) will adjust the duration that the chip selects,
address, and data (during a write) will be held.
Setting the recovery phase parameter (T5) will adjust the duration between successive accesses on
the expansion interface.
T is the period of the clock measured in ns.
Clock to output delay for all signals will be a maximum of 15 ns for devices requiring operation in
synchronous mode.
Timing was designed for a system load between 5pF and 60pF for high drive setting
EX_RD_N
EX_CS_N
EX_DATA
(hr_w_n)
(hds1_n)
EX_CLK
(hcs_n)
(hcntl)
(hrdy)
Tcs2hds1val
(hdin)
(hbil)
Parameter
Valid address to valid chip select
Write data valid prior to EXP_MOT_DS_N falling edge
Pulse width of the EXP_MOT_DS_N
Valid data after the rising edge of EXP_MOT_DS_N
Data valid required before the rising edge of
EXP_MOT_DS_N
Data hold required after the rising edge of EXP_MOT_DS_N
Time required between successive accesses on the
expansion interface.
®
IXP46X Product Line of Network Processors
T1
Thds1_pulse
Tdata_setup
T2
Tadd_setup
Valid
Intel
T3
Data
®
Tdata_hold
T4
IXP45X and Intel
Trecov
T5
T1
T2
®
IXP46X Product Line of Network Processors
Min.
14.7
1
1
1
1
2
1
T3
Valid
Data
Max.
16
16
4
4
4
Units
T4
Cycles
Cycles
Cycles
Cycles
Cycles
ns
ns
Datasheet
T5
Notes
1, 2,
3,
4,
5,
6
7
7
7
131
7

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