gwixp465bad ETC-unknow, gwixp465bad Datasheet - Page 129

• Manufacturer Part Number: gwixp465bad
• Description: Network Proc 1.3v/1.4v/2.5v/3.3v 400mhz 544-pin Bga
• Manufacturer: ETC-unknow

Datasheet—Intel
Figure 35.
Table 68.
August 2006
Document Number:
Motorola* Multiplexed Mode
Motorola* Multiplexed Mode Values (Sheet 1 of 2)
®
Symbol
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
T
T
306261-004US
IXP45X and Intel
T
(exp_mot_ds_n)
(exp_mot_ds_n)
ale2addrhold
dholdafterds
T
T
(exp_mot_rnw)
(exp_mot_rnw)
dval2valds
alepulse
dspulse
EX_WR_N
EX_WR_N
EX_ADDR
EX_RD_N
EX_RD_N
EX_CS_N
EX_DATA
EX_DATA
EX_CLK
The EX_ALE signal is extended form T to 4T nnsec, based on the programming of the T1 timing
parameter. The parameter Tale2addrhold is fixed at T.
Setting the address phase parameter (T1) will adjust the duration that the address appears to the
external device.
Setting the data setup phase parameter (T2) will adjust the duration that the data appears prior to a
data strobe (read or write) to an external device.
Setting the data strobe phase parameter (T3) will adjust the duration that the data strobe appears
(read or write) to an external device. Data will be available during this time as well.
Setting the data hold strobe phase parameter (T4) will adjust the duration that the chip selects,
address, and data (during a write) will be held.
Setting the recovery phase parameter (T5) will adjust the duration between successive accesses on
the expansion interface.
T is the period of the clock measured in ns.
Clock to output delay for all signals will be a maximum of 15 ns for devices requiring operation in
synchronous mode.
Timing was designed for a system load between 5pF and 60pF for high drive setting
EX_ALE
Parameter
Pulse width of ALE (ADDR is valid at the rising edge of ALE)
Valid address hold time after from falling edge of ALE
Write data valid prior to EXP_MOT_DS_N falling edge
Pulse width of the EXP_MOT_DS_N
Valid data after the rising edge of EXP_MOT_DS_N
®
IXP46X Product Line of Network Processors
T alepulse T ale2valcs
ALE Extended
Address
2-5 Cycles
Address
Multiplexed Address/Data
T1
T ale2addrhold
Intel
®
IXP45X and Intel
T dval2valds
1-4 Cycles
T2
Valid Address
1-16 Cycles
Output Data
T dspulse
T rdsetup
®
T3
Input Data
IXP46X Product Line of Network Processors
T dhold2afterds
1-4 Cycles
Min.
T4
1
1
1
1
1
T rdhold
Max.
16
4
1
4
4
1-16 Cycles
T recov
T5
Units
Cycles
Cycles
Cycles
Cycles
Cycles
A9587-01
Datasheet
Notes
1,
1, 2,
3,
4,
5,
7
7
7
7
129
7