gwixp465bad ETC-unknow, gwixp465bad Datasheet - Page 25

• Manufacturer Part Number: gwixp465bad
• Description: Network Proc 1.3v/1.4v/2.5v/3.3v 400mhz 544-pin Bga
• Manufacturer: ETC-unknow

Datasheet—Intel
3.1.9
3.1.9.1
August 2006
Document Number:
The programming priority of the MCU is for the Memory Port Interface to have the
highest priority and two AHB ports will have the next highest priority. For more
information on MCU arbitration support and configuration see the Intel
Intel
One item to be aware of is that when ECC is being used, the memory chip chosen to
support the ECC must match that of the technology chosen on the interface. Therefore,
if x8 in a given configuration technology is chosen then the ECC memory chip must be
the same. If a x16 configuration is chosen then a x16 chip must be used for the ECC
chip.
Expansion Interface
The expansion interface allows easy and — in most cases — glue-less connection to
peripheral devices. It also provides input information for device configuration after
reset.
Some of the peripheral device types are SRAM, flash, ATM control interfaces, and DSPs
used for voice applications. (Some voice configurations can be supported by the HSS
interfaces and the Intel XScale
algorithms.)
The expansion interface functions in two modes of operation:
Expansion Bus Legacy Mode of Operation
In the legacy mode of operation, the expansion interface is a 16-bit interface that
allows an address range of 512 bytes to 16 Mbytes, using 24 address lines for each of
the eight independent chip selects.
Accesses to the expansion bus interface is completed in five phases. Each of the five
phases can be lengthened or shortened by setting various configuration registers on a
per-chip-select basis. This feature allows the IXP45X/IXP46X network processors to
connect to a wide variety of peripheral devices with varying speeds.
The expansion interface supports Intel or Motorola* microprocessor-style bus cycles.
The bus cycles can be configured to be multiplexed address/data cycles or separate
address/data cycles for each of the eight chip-selects.
Additionally, Chip Selects 4 through 7 can be configured to support Texas Instruments*
HPI-8 or HPI-16 style accesses for DSPs.
The expansion interface is an asynchronous interface to externally connected chips.
However, a clock must be supplied to expansion interface of the IXP45X/IXP46X
network processors for the interface to operate. This clock can be driven from GPIO 15
or an external source. The maximum clock rate that the expansion interface can accept
in legacy mode of operation is 66 MHz. If GPIO 15 is used as the clock source, the
Expansion Bus interface can only be clocked at a maximum of 33.33 MHz. GPIO 15’s
maximum clock rate is 33.33 MHz.
By providing this legacy mode of operation, code developed for previous generations of
this platform becomes easily portable.
®
• Legacy (16-bit, data mode)
• Enhanced (32-bit, data mode)
306261-004US
IXP45X and Intel
®
IXP46X Product Line of Network Processors Developer’s Manual.
®
IXP46X Product Line of Network Processors
®
processor, implementing voice-compression
Intel
®
IXP45X and Intel
®
IXP46X Product Line of Network Processors
®
IXP45X and
Datasheet
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