STM32W108CBU6 STMICROELECTRONICS [STMicroelectronics], STM32W108CBU6 Datasheet - Page 103

• Manufacturer Part Number: STM32W108CBU6
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STM32W108CB, STM32W108HB
8.1.13
Timers and external trigger synchronization
The timers can be synchronized with an external trigger in several modes: reset mode,
gated mode, and trigger mode.
Slave mode: reset mode
Reset mode reinitializes the counter and its prescaler in response to an event on a trigger
input. Moreover, if the TIM_URS bit in the TIMx_CR1 register is low, an update event is
generated. Then all the buffered registers (TIMx_ARR, TIMx_CCRy) are updated.
In the following example, the up-counter is cleared in response to a rising edge on the TI1
input:
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The counter starts counting on the internal clock, then behaves normally until the TI1 rising
edge. When TI1 rises, the counter is cleared and restarts from 0. In the meantime, the
trigger flag is set (the INT_TIMTIF bit in the INT_TIMxFLAG register) and an interrupt
request can be sent if enabled (depending on the INT_TIMTIF bit in the INT_TIMxCFG
register).
Figure 36
between the rising edge on TI1 and the actual reset of the counter is due to the
resynchronization circuit on the TI1 input.
Figure 36. Control circuit in reset mode
Slave mode: gated mode
In gated mode the counter is enabled depending on the level of a selected input.
In the following example, the up-counter counts only when the TI1 input is low:
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Configure the channel 1 to detect rising edges on TI1: Configure the input filter
duration. In this example, no filter is required so TIM_IC1F = 0000. The capture
prescaler is not used for triggering, so it is not configured. The TIM_CC1S bits select
the input capture source only, TIM_CC1S = 01 in the TIMx_CCMR1 register. Write
TIM_CC1P = 0 in the TIMx_CCER register to validate the polarity, and detect rising
edges only.
Configure the timer in reset mode by writing TIM_SMS = 100 in the TIMx_SMCR
register. Select TI1 as the input source by writing TIM_TS = 101 in the TIMx_SMCR
register.
Start the counter by writing TIM_CEN = 1 in the TIMx_CR1 register.
Configure channel 1 to detect low levels on TI1 Configure the input filter duration. In
this example, no filter is required, so TIM_IC1F = 0000. The capture prescaler is not
used for triggering, so it is not configured. The TIM_CC1S bits select the input capture
source only, TIM_CC1S = 01 in the TIMx_CCMR1 register. Write TIM_CC1P = 1 in the
TIMx_CCER register to validate the polarity (and detect low level only).
shows this behavior when the auto-reload register TIMx_ARR = 0x36. The delay
Doc ID 16252 Rev 2
General-purpose timers
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