STM32W108CBU6 STMICROELECTRONICS [STMicroelectronics], STM32W108CBU6 Datasheet - Page 5

• Manufacturer Part Number: STM32W108CBU6
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STM32W108CB, STM32W108HB
8
7.4
7.5
7.6
7.7
General-purpose timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
8.1
7.3.3
7.3.4
7.3.5
SPI slave mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Two wire (TWI) serial interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
7.5.1
7.5.2
7.5.3
Universal asynchronous receiver / transmitter (UART) registers . . . . . . . 70
7.6.1
7.6.2
7.6.3
7.6.4
DMA channel registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
7.7.1
7.7.2
7.7.3
7.7.4
7.7.5
7.7.6
7.7.7
7.7.8
7.7.9
7.7.10
7.7.11
7.7.12
7.7.13
7.7.14
7.7.15
7.7.16
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
8.1.1
8.1.2
8.1.3
8.1.4
SPI status register (SCx_SPISTAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Serial clock linear prescaler register (SCx_RATELIN) . . . . . . . . . . . . . . 68
Serial clock exponential prescaler register (SCx_RATEEXP) . . . . . . . . 68
TWI status register (SCx_TWISTAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
TWI control 1 register (SCx_TWICTRL1) . . . . . . . . . . . . . . . . . . . . . . . 69
TWI control 2 register (SCx_TWICTRL2) . . . . . . . . . . . . . . . . . . . . . . . 70
UART status register (SC1_UARTSTAT) . . . . . . . . . . . . . . . . . . . . . . . . 70
UART configuration register (SC1_UARTCFG) . . . . . . . . . . . . . . . . . . . 71
UART baud rate period register (SC1_UARTPER) . . . . . . . . . . . . . . . . 72
UART baud rate fractional period register (SC1_UARTFRAC) . . . . . . . 72
Serial DMA control register (SCx_DMACTRL) . . . . . . . . . . . . . . . . . . . 72
Serial DMA status register (SCx_DMASTAT) . . . . . . . . . . . . . . . . . . . . 73
Transmit DMA begin address register A (SCx_TXBEGA) . . . . . . . . . . . 75
Transmit DMA begin address register B (SCx_TXBEGB) . . . . . . . . . . . 75
Transmit DMA end address register A (SCx_TXENDA) . . . . . . . . . . . . 75
Transmit DMA end address register B (SCx_TXENDB) . . . . . . . . . . . . 76
Transmit DMA count register (SCx_TXCNT) . . . . . . . . . . . . . . . . . . . . . 76
Receive DMA begin address register A (SCx_RXBEGA) . . . . . . . . . . . 76
Receive DMA begin address register B (SCx_RXBEGB) . . . . . . . . . . . 77
Receive DMA end address register A (SCx_RXENDA) . . . . . . . . . . . . . 77
Receive DMA end address register B (SCx_RXENDB) . . . . . . . . . . . . . 77
Receive DMA count register A (SCx_RXCNTA) . . . . . . . . . . . . . . . . . . 78
Receive DMA count register B (SCx_RXCNTB) . . . . . . . . . . . . . . . . . . 78
Saved receive DMA count register (SCx_RXCNTSAVED) . . . . . . . . . . 78
DMA first receive error register A (SCx_RXERRA) . . . . . . . . . . . . . . . . 79
DMA first receive error register B (SCx_RXERRB) . . . . . . . . . . . . . . . . 79
Time-base unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Counter modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Clock selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Capture/compare channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Doc ID 16252 Rev 2
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