STM32W108CBU6 STMICROELECTRONICS [STMicroelectronics], STM32W108CBU6 Datasheet - Page 97

no-image

STM32W108CBU6

Manufacturer Part Number
STM32W108CBU6
Description
High-performance, IEEE 802.15.4 wireless system-on-chip
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STM32W108CBU6
Manufacturer:
ST
Quantity:
20 000
Part Number:
STM32W108CBU61
Manufacturer:
ST
0
Part Number:
STM32W108CBU61TR
Manufacturer:
ST
0
Part Number:
STM32W108CBU63
Manufacturer:
ST
0
Part Number:
STM32W108CBU63TR
Manufacturer:
ST
0
Part Number:
STM32W108CBU63TR
Manufacturer:
ST
Quantity:
20 000
Part Number:
STM32W108CBU64
Manufacturer:
ST
Quantity:
2 330
Part Number:
STM32W108CBU64
Manufacturer:
ST
0
Part Number:
STM32W108CBU64TR
Manufacturer:
IDT
Quantity:
5 803
Part Number:
STM32W108CBU64TR
Manufacturer:
ST
Quantity:
20 000
STM32W108CB, STM32W108HB
Because the buffer registers are only transferred to the shadow registers when an update
event occurs, before starting the counter initialize all the registers by setting the TIM_UG bit
in the TIMx_EGR register.
OCy polarity is software programmable using the TIM_CCyP bit in the TIMx_CCER register.
It can be programmed as active high or active low. OCy output is enabled by the TIM_CCyE
bit in the TIMx_CCER register. Refer to the TIMx_CCER register description in the
Registers section for more details.
In PWM mode (1 or 2), TIMx_CNT and TIMx_CCRy are always compared to determine
whether TIMx_CCRy ≤ TIMx_CNT or TIMx_CNT ≤ TIMx_CCRy,depending on the direction
of the counter. The OCyREF signal is asserted only:
This allows software to force a PWM output to a particular state while the timer is running.
The timer is able to generate PWM in edge-aligned mode or center-aligned mode
depending on the TIM_CMS bits in the TIMx_CR1 register.
PWM edge-aligned mode: up-counting configuration
Up-counting is active when the TIM_DIR bit in the TIMx_CR1 register is low. Refer to
counting mode on page
The following example uses PWM mode 1. The reference PWM signal OCyREF is high as
long as TIMx_CNT < TIMx_CCRy, otherwise it becomes low. If the compare value in
TIMx_CCRy is greater than the auto-reload value in TIMx_ARR, then OCyREF is held at 1.
If the compare value is 0, then OCyREF is held at 0.
PWM waveforms in an example, where TIMx_ARR = 8.
Figure 31. Edge-aligned PWM waveforms (ARR = 8)
PWM edge-aligned mode: down-counting configuration
Down-counting is active when the TIM_DIR bit in the TIMx_CR1 register is high. Refer to
Down-counting mode on page 85
When the result of the comparison changes, or
When the output compare mode (TIM_OCyM bits in the TIMx_CCMR1 register)
switches from the "frozen" configuration (no comparison, TIM_OCyM = 000) to one of
the PWM modes (TIM_OCyM = 110 or 111).
83.
Doc ID 16252 Rev 2
for more information.
Figure 31
shows some edge-aligned
General-purpose timers
Up-
97/179

Related parts for STM32W108CBU6