STM32W108CBU6 STMICROELECTRONICS [STMicroelectronics], STM32W108CBU6 Datasheet - Page 79

• Manufacturer Part Number: STM32W108CBU6
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STM32W108CB, STM32W108HB
7.7.15
7.7.16
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15
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14
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[12:0] SC_RXCNTSAVED: Receive DMA count saved in SPI slave mode when nSSEL deasserts.
[12:0] SC_RXERRA: The offset from the start of DMA receive buffer A of the first byte received with a
[12:0] SC_RXERRB: The offset from the start of DMA receive buffer B of the first byte received with a
DMA first receive error register A (SCx_RXERRA)
Address offset: 0xC834 (SC1_RXERRA) and 0xC034 (SC2_RXERRA)
Reset value:
DMA first receive error register B (SCx_RXERRB)
Address offset: 0xC838 (SC1_RXERRB) and 0xC038 (SC2_RXERRB)
Reset value:
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13
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29
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13
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The count is only saved the first time nSSEL deasserts.
parity, frame, or overflow error. Note that an overflow error occurs at the input to the receive
FIFO, so this offset is 4 bytes before the overflow position. If there is no error, it reads zero. This
register will not be updated by subsequent errors until the buffer unloads and is reloaded, or the
receive DMA is reset.
parity, frame, or overflow error. Note that an overflow error occurs at the input to the receive
FIFO, so this offset is 4 bytes before the overflow position. If there is no error, it reads zero. This
register will not be updated by subsequent errors until the buffer unloads and is reloaded, or the
receive DMA is reset.
28
12
28
12
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r
r
27
11
27
11
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r
r
0x0000 0000
0x0000 0000
26
10
26
10
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r
r
25
25
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9
9
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Doc ID 16252 Rev 2
24
24
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8
8
r
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23
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23
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7
7
r
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SC_RXERRA
SC_RXERRB
22
22
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6
6
r
r
21
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21
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5
5
r
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20
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20
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4
4
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19
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3
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Serial interfaces
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2
2
r
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17
17
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1
1
r
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79/179
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0
0
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