STM32W108CBU6 STMICROELECTRONICS [STMicroelectronics], STM32W108CBU6 Datasheet - Page 70

• Manufacturer Part Number: STM32W108CBU6
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Serial interfaces
7.5.3
7.6
7.6.1
70/179
31
rw
15
rw
31
rw
15
rw
30
rw
14
rw
30
rw
14
rw
TWI control 2 register (SCx_TWICTRL2)
Address offset: 0xC850 (SC1_TWICTRL2) and 0xC050 (SC2_TWICTRL2)
Reset value:
Universal asynchronous receiver / transmitter (UART)
registers
Refer to the SPI Master mode section for a description of the SCx_DATA register.
UART status register (SC1_UARTSTAT)
Address offset: 0xC848
Reset value:
29
rw
13
rw
29
rw
13
rw
[0] SC_TWIACK: Setting this bit signals ACK after a received byte. Clearing this bit signals NACK
[6] SC_UARTTXIDLE: This bit is set when both the transmit FIFO and the transmit serializer are
[5] SC_UARTPARERR: This bit is set when the byte in the data register was received with a parity
[4] SC_UARTFRMERR: This bit is set when the byte in the data register was received with a frame
[3] SC_UARTRXOVF: This bit is set when the receive FIFO has been overrun. This occurs if a byte
after a received byte.
empty.
error. This bit is updated when the data register is read, and is cleared if the receive FIFO is
empty.
error. This bit is updated when the data register is read, and is cleared if the receive FIFO is
empty.
is received when the receive FIFO is full. This bit is cleared by reading the data register.
28
12
28
12
rw
rw
rw
rw
27
11
27
11
rw
rw
rw
rw
0x0000 0000
0x0000 0040
26
10
26
10
rw
rw
rw
rw
25
25
rw
rw
rw
rw
9
9
Doc ID 16252 Rev 2
24
24
rw
rw
rw
rw
8
8
23
rw
rw
23
rw
rw
7
7
SC_UA
RTTXI
DLE
22
22
rw
rw
rw
6
6
r
SC_UA
RTPAR
ERR
21
rw
rw
21
rw
5
5
r
STM32W108CB, STM32W108HB
RMER
SC_U
ARTF
20
rw
rw
20
rw
R
4
4
r
SC_UA
RTRX
OVF
19
rw
rw
19
rw
3
3
r
SC_UA
RTTXF
REE
18
18
rw
rw
rw
2
2
r
SC_UA
RTRXV
17
17
AL
rw
rw
rw
1
1
r
SC_UA
RTCTS
WIACK
SC_T
16
rw
rw
16
rw
0
0
r