DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 143

MCU 3V 384K 128-QFP

DF2367VF33

Manufacturer Part Number
DF2367VF33
Description
MCU 3V 384K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2367VF33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2367VF33
HD64F2367VF33

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4.3.2
If an interrupt is accepted after a reset but before the stack pointer (SP) is initialized, the PC and
CCR will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests,
including NMI, are disabled immediately after a reset. Since the first instruction of a program is
always executed immediately after the reset state ends, make sure that this instruction initializes
the stack pointer (example: MOV.L #xx: 32, SP).
4.3.3
After reset release, MSTPCR is initialized to H'0FFF and EXMSTPCR is to H'FFFD, all modules
except the DMAC and the DTC enter module stop mode.
Figure 4.2 Reset Sequence (Advanced Mode with On-Chip ROM Disabled)
D15 to D0
(1)(3) Reset exception handling vector address (when reset, (1)=H'000000, (3)=H'000002)
(2)(4) Start address (contents of reset exception handling vector address)
(5) Start address ((5)=(2)(4))
(6) First program instruction
Note: * Seven program wait states are inserted.
Address bus
Interrupts after Reset
On-Chip Peripheral Functions after Reset Release
,
(1)
*
Vector fetch
(2)
High
*
Rev.6.00 Mar. 18, 2009 Page 83 of 980
(3)
(4)
Internal
processing
Section 4 Exception Handling
Prefetch of first
program instruction
*
(5)
REJ09B0050-0600
(6)

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