DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 696

MCU 3V 384K 128-QFP

DF2367VF33

Manufacturer Part Number
DF2367VF33
Description
MCU 3V 384K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2367VF33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2367VF33
HD64F2367VF33

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Section 15 I
Bit Bit Name
0
15.3.3
ICMR performs master mode wait control and selects the transfer bit count.
Bit Bit Name
7
6
5, 4 ⎯
3
Rev.6.00 Mar. 18, 2009 Page 636 of 980
REJ09B0050-0600
WAIT
BCWP
I
2
C Bus Mode Register (ICMR)
2
C Bus Interface2 (IIC2) (Option)
1
0
0
All 1
Initial Value R/W
Initial Value R/W
1
R/W
R/W
R/W
Description
Reserved
This bit is always read as 1.
Description
Reserved
The write value should always be 0.
Wait Insertion Bit
This bit selects whether to insert a wait after data transfer
except for the acknowledge bit. When WAIT is set to 1,
after the fall of the clock for the final data bit, low period is
extended for two transfer clocks. If WAIT is cleared to 0,
data and acknowledge bits are transferred consecutively
with no wait inserted.
The setting of this bit is invalid in slave mode.
Reserved
These bits are always read as 1.
BC Write Protect
This bit controls the BC2 to BC0 modifications. When
modifying BC2 to BC0, this bit should be cleared to 0 and
use the MOV instruction.
0: When writing, values of BC2 to BC0 are set.
1: When reading, 1 is always read.
When writing, settings of BC2 to BC0 are invalid.

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