DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 412

• Manufacturer Part Number: DF2367VF33
• Description: MCU 3V 384K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2367VF33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2367VF33; HD64F2367VF33

Section 9 I/O Ports
•
The pin function is switched as shown below according to the combination of bit ICE in ICCRA
of I
ICE
CKE1
C/A
CKE0
P34DDR
Pin function
Notes: 1. NMOS open-drain output when P34ODR = 1.
•
The pin function is switched as shown below according to the combination of bit ICE in ICCRA
of I
ICE
RE
P33DDR
Pin function
Notes: 1. NMOS open-drain output when P33ODR = 1.
•
The pin function is switched as shown below according to the combination of bit ICE in ICCRA
of I
ICE
RE
P32DDR
Pin function
Notes: 1. NMOS open-drain output when P32ODR = 1.
Rev.6.00 Mar. 18, 2009 Page 352 of 980
REJ09B0050-0600
2
2
2
C_0, bit C/A in SMR, bits CKE0 and CKE1 in SCR, and bit P34DDR.
C_0, bit RE in SCR of SCI_1 and bit P33DDR.
C_0, bit RE in SCR of SCI_0 and bit P32DDR.
P34/SCK0/SCK4/SDA0
P33/RxD1/SCL1
P32/RxD0/IrRxD/SDA1
2. NMOS open-drain output regardless of P34ODR
3. Simultaneous output of SCK0 and SCK4 cannot be set.
2. NMOS open-drain output regardless of P33ODR
2. NMOS open-drain output regardless of P32ODR
input
P34
P33 input
P32 input
0
0
0
0
output *
P34
0
1
0
0
1
P33 output *
P32 output *
0
SCK0/SCK4
output *
0
1
0
1
—
0
1
1
1
1
*
3
SCK0/SCK4
output *
RxD0/IrRxD
RxD1 input
—
—
1
input
—
—
1
1
1
*
3
SCK0/SCK4
input
—
—
—
1
SDA1 I/O *
SCL1 I/O *
—
—
—
—
1
1
SDA0
I/O *
—
—
—
—
1
2
2
2