DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 240

MCU 3V 384K 128-QFP

DF2367VF33

Manufacturer Part Number
DF2367VF33
Description
MCU 3V 384K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2367VF33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2367VF33
HD64F2367VF33

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Manufacturer
Quantity
Price
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Manufacturer:
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Section 6 Bus Controller (BSC)
Rev.6.00 Mar. 18, 2009 Page 180 of 980
REJ09B0050-0600
φ
Address bus
RASn (CSn)
UCAS, LCAS
RD
OE
Data bus
Note: n = 2, 3
⎯ the chip enters software standby mode
⎯ the external bus is released
⎯ the RCDM bit or BE bit is cleared to 0
If a transition is made to the all-module-clocks-stopped mode in the RAS down state, the clock
will stop with RAS low. To enter the all-module-clocks-stopped mode with RAS high, the
RCDM bit must be cleared to 0 before executing the SLEEP instruction.
Figure 6.31 Example of Operation Timing in RAS Down Mode
T
Row address
p
DRAM space read
T
r
(RAST = 0, CAST = 0)
Column address 1
T
c1
T
c2
External address
Normal space
T
1
read
T
2
Column address 2
DRAM space
T
c1
read
T
c2

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