DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 293

MCU 3V 384K 128-QFP

DF2367VF33

Manufacturer Part Number
DF2367VF33
Description
MCU 3V 384K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2367VF33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2367VF33
HD64F2367VF33

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• DMABCRL
Bit
7
Bit Name
DTME1
Initial Value
0
R/W
R/W
Description
Data Transfer Master Enable 1
Together with the DTE1 bit, this bit controls
enabling or disabling of data transfer on channel
1. When both the DTME1 bit and DTE1 bit are
set to 1, transfer is enabled for channel 1.
If channel 1 is in the middle of a burst mode
transfer when an NMI interrupt is generated, the
DTME1 bit is cleared, the transfer is interrupted,
and bus mastership passes to the CPU. When
the DTME1 bit is subsequently set to 1 again,
the interrupted transfer is resumed. In block
transfer mode, however, the DTME1 bit is not
cleared by an NMI interrupt, and transfer is not
interrupted.
[Clearing conditions]
[Setting condition]
When 1 is written to DTME1 after reading
DTME1 = 0
When initialization is performed
When NMI is input in burst mode
When 0 is written to the DTME1 bit
Rev.6.00 Mar. 18, 2009 Page 233 of 980
Section 7 DMA Controller (DMAC)
REJ09B0050-0600

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