DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 705

MCU 3V 384K 128-QFP

DF2367VF33

Manufacturer Part Number
DF2367VF33
Description
MCU 3V 384K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2367VF33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2367VF33
HD64F2367VF33

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7. When the STOP bit in ICSR is set to 1, the operation returns to the slave receive mode.
(master output)
(master output)
(slave output)
processing
ICDRS
ICDRT
TDRE
TEND
User
receive device while ACKE in ICIER is 1. Then, issue the stop condition to clear TEND or
NACKF.
SDA
SDA
SCL
[2] Instruction of start
condition issuance
Figure 15.5 Master Transmit Mode Operation Timing 1
Bit 7
1
[3] Write data to ICDRT (first byte).
Bit 6
2
Clear TDRE.
Address + R/
Bit 5
3
Address + R/
Slave address
Bit 4
4
Bit 3
5
Bit 2
6
Section 15 I
[4] Write data to ICDRT (second byte).
Rev.6.00 Mar. 18, 2009 Page 645 of 980
Bit 1
Clear TDRE and TEND.
7
Bit 0
R/
8
2
C Bus Interface2 (IIC2) (Option)
A
9
[5] Write data to ICDRT (third byte).
Clear TDRE.
Data 1
Data 1
Bit 7
REJ09B0050-0600
1
Bit 6
Data 2
2

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