MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 144

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MC68HC16Z1CFC16

Manufacturer Part Number
MC68HC16Z1CFC16
Description
IC MPU 1K RAM 16MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheets

Specifications of MC68HC16Z1CFC16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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5.6.2.2 Write Cycle
5-38
During a write cycle, the MCU transfers data to an external memory or peripheral de-
vice. If the instruction specifies a long-word or word operation, the MCU attempts to
write two bytes at once. For a byte operation, the MCU writes one byte. The portion of
the data bus upon which each byte is written depends on operand size, peripheral ad-
dress, and peripheral port size.
Refer to
mation.
to the SIM Reference Manual (SIMRM/AD) for more information.
Figure 5-13
5.5.2 Dynamic Bus Sizing
1) SET R/W TO READ
2) DRIVE ADDRESS ON ADDR[23:0]
3) DRIVE FUNCTION CODE ON FC[2:0]
4) DRIVE SIZ[1:0] FOR OPERAND SIZE
NEGATE AS AND DS (S5)
ASSERT AS AND DS (S1)
START NEXT CYCLE (S0)
ADDRESS DEVICE (S0)
DECODE DSACK (S3)
LATCH DATA (S4)
Figure 5-12 Word Read Cycle Flowchart
Freescale Semiconductor, Inc.
MCU
is a flowchart of a write-cycle operation for a word transfer. Refer
For More Information On This Product,
SYSTEM INTEGRATION MODULE
Go to: www.freescale.com
and
5.5.4 Misaligned Operands
1) DECODE ADDR, R/W, SIZ[1:0], DS
2) PLACE DATA ON DATA[15:0] OR
3) DRIVE DSACK SIGNALS
1) REMOVE DATA FROM DATA BUS
2) NEGATE DSACK
DATA[15:8] IF 8-BIT DATA
TERMINATE CYCLE (S5)
PRESENT DATA (S2)
PERIPHERAL
M68HC16 Z SERIES
USER’S MANUAL
for more infor-
RD CYC FLOW

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