MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 185

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MC68HC16Z1CFC16

Manufacturer Part Number
MC68HC16Z1CFC16
Description
IC MPU 1K RAM 16MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheets

Specifications of MC68HC16Z1CFC16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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7.5 Low-Power Stop Mode Operation
7.6 ROM Signature
7.7 Reset
M68HC16 Z SERIES
USER’S MANUAL
Refer to
Low-power stop mode minimizes MCU power consumption. Setting the STOP bit in
MRMCR places the MRM in low-power stop mode. In low-power stop mode, the array
cannot be accessed. The reset state of STOP is the complement of the logic state of
DATA14 during reset. Low-power stop mode is exited by clearing STOP.
Signature registers RSIGHI and RSIGLO contain a user-specified mask-programmed
signature pattern. A user-specified signature algorithm provides the capability to verify
ROM array contents.
The state of the MRM following reset is determined by the default values programmed
into the MRMCR BOOT, LOCK, ASPC[1:0], and WAIT[1:0] bits. The default array
base address is determined by the values programmed into ROMBAL and ROMBAH.
When the mask programmed value of the MRMCR BOOT bit is zero, the contents of
MRM bootstrap words ROMBS[0:3] are used as reset vectors. When the mask pro-
grammed value of the MRMCR BOOT bit is one, reset vectors are fetched from exter-
nal memory, and system integration module chip-select logic is used to assert the boot
ROM select signal CSBOOT. Refer to
information concerning external boot ROM selection.
5.6 Bus Operation
WAIT[1:0]
00
01
10
11
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 7-2 Wait States Field
for more information concerning access times.
Go to: www.freescale.com
Wait States
Number of
MASKED ROM MODULE
–1
0
1
2
5.9.4 Chip-Select Reset Operation
Clocks per Transfer
3
4
5
2
for more
7-3

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