MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 383

• Manufacturer Part Number: MC68HC16Z1CFC16
• Description: IC MPU 1K RAM 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CFC16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

POW — Power-Up Reset
SW — Software Watchdog Reset
HLT — Halt Monitor Reset
SYS — System Reset
TST — Test Submodule Reset
D.2.5 System Integration Test Register E
SIMTRE — System Integration Test Register E
D.2.6 Port E Data Register
PORTE0 — Port E0 Data Register
PORTE1 — Port E1 Data Register
D.2.7 Port E Data Direction Register
DDRE — Port E Data Direction Register
M68HC16 Z SERIES
USER’S MANUAL
15
15
RESET:
RESET:
Reset caused by the power-up reset circuit.
Reset caused by the software watchdog circuit.
Reset caused by the halt monitor.
The CPU16 does not support this function. This bit will never be set.
Reset caused by the test submodule. Used during factory test reserved operating
mode only.
Used for factory test only.
This register can be accessed in two locations and can be read or written at any time.
A write to this register is stored in an internal data latch, and if any pin in the corre-
sponding port is configured as an output, the value stored for that bit is driven out on
the pin. A read of this data register returns the value at the pin only if the pin is config-
ured as a discrete input. Otherwise, the value read is the value stored in the register.
Bits [15:8] are unimplemented and will always read zero.
Bits in this register control the direction of the port E pin drivers when pins are config-
ured for I/O. Setting a bit configures the corresponding pin as an output; clearing a bit
configures the corresponding pin as an input. This register can be read or written at
any time. Bits [15:8] are unimplemented and will always read zero.
NOT USED
NOT USED
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
REGISTER SUMMARY
8
8
PE7
DDE7
U
7
7
0
PE6
DDE6
6
U
6
0
PE5
DDE5
U
5
5
0
PE4
DDE4
U
4
4
0
PE3
DDE3
U
3
3
0
PE2
DDE2
U
2
2
0
$YFFA08
$YFFA10
$YFFA12
$YFFA14
PE1
DDE1
U
1
1
0
PE0
DDE0
U
0
0
0
D-9