MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 179

• Manufacturer Part Number: MC68HC16Z1CFC16
• Description: IC MPU 1K RAM 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CFC16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

6.1 SRAM Register Block
M68HC16 Z SERIES
USER’S MANUAL
The standby RAM (SRAM) module consists of a fixed-location control register block
and an array of fast (two clock) static RAM that may be mapped to a user specified
location in the system memory map. Array size depends on the M68HC16, M68CK16,
and M68CM16 Z-series version. Refer to
The SRAM is especially useful for system stacks and variable storage.
The SRAM can be mapped to any address that is a multiple of the array size so long
as SRAM boundaries do not overlap the module control registers (overlap makes the
registers inaccessible). Data can be read/written in bytes, words or long words. SRAM
is powered by V
maintained by power from the V
matic.
There are four SRAM control registers: the RAM module configuration register (RAM-
MCR), the RAM test register (RAMTST), and the RAM array base address registers
(RAMBAH/RAMBAL).
The module mapping bit (MM) in the SIM configuration register (SIMCR) defines the
most significant bit (ADDR23) of the IMB address for each M68HC16, M68CK16, and
M68CM16 Z-series module. Because ADDR[23:20] are driven to the same value as
ADDR19, MM must be set to one. If MM is cleared, IMB modules are inaccessible. For
more information about how the state of MM affects the system, refer to
Mapping.
The SRAM control register consists of eight bytes, but not all locations are implement-
ed. Unimplemented register addresses are read as zeros, and writes have no effect.
Refer to
bit/field definitions.
D.3 Standby RAM Module
DD
in normal operation. During power-down, SRAM contents can be
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 6-1 SRAM Configuration
STANDBY RAM MODULE
Z-Series Device
MC68CM16Z1
MC68HC16Z1
MC68CK16Z1
MC68HC16Z4
MC68CK16Z4
MC68HC16Z2
MC68HC16Z3
STANDBY RAM MODULE
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STBY
SECTION 6
input. Power switching between sources is auto-
for the register block address map and register
Table 6-1
Array Size
2 Kbytes
4 Kbytes
1 Kbyte
for appropriate SRAM array size.
5.2.1 Module
6-1