M30802FCGP#D3 Renesas Electronics America, M30802FCGP#D3 Datasheet - Page 179

• Manufacturer Part Number: M30802FCGP#D3
• Description: IC M16C MCU FLASH 128K 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30802FCGP#D3

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M
R
R
21. A/D Converter
e
E
1
v
Table 21.1 Performance of A/D converter
Note 1: Does not depend on use of sample and hold function.
Note 2: When f(X
J
6
Method of A/D conversion
Analog input voltage (Note 1)
Operating clock f
Resolution
Absolute precision
Operating modes
Analog input pins
A/D conversion start condition • Software trigger
Conversion speed per pin
1 .
0
The A/D converter consists of one 10-bit successive approximation A/D converter circuit with a capacitive
coupling amplifier. Pins P10
direction registers of these pins for A/D conversion must therefore be set to input. The Vref connect bit (bit
5 at address 0397
voltage input pin (V
resistance ladder from V
conversion only after setting bit 5 of 0397
The result of A/D conversion is stored in the A/D registers of the selected pins. When set to 10-bit precision,
the low 8 bits are stored in the even addresses and the high 2 bits in the odd addresses. When set to 8-bit
precision, the low 8 bits are stored in the even addresses.
Table 21.1 shows the performance of the A/D converter. Figure 21.1 shows the block diagram of the
A/D converter, and Figures 21.2 and 21.3 show the A/D converter-related registers.
C
9
0 .
8 /
B
0
0
0
1
A
8
G
Without sample and hold function, set the f
With the sample and hold function, set the f
u
7
o r
. g
0 -
u
Item
1
0
p
0
, 2
0
2
AD
0
0
IN
5
(Note 2)
) is over 10 MHz, the f
16
Page 166
REF
) can be used to isolate the resistance ladder of the A/D converter from the reference
) when the A/D converter is not used. Doing so stops any current flowing into the
REF
Successive approximation (capacitive coupling amplifier)
0V to AV
V
V
8-bit or 10-bit (selectable)
V
• 8-bit resolution
• 10-bit resolution
However, when using AN
is connected :
V
• Without sample and hold function (8-bit resolution)
One-shot mode, repeat mode, single sweep mode, repeat sweep mode 0,
and repeat sweep mode 1
8 pins (AN
• External trigger (can be retriggered)
___________
AD
• Without sample and hold function
• With sample and hold function
0
, reducing the power dissipation. When using the A/D converter, start A/D
CC
CC
CC
CC
f o
A/D conversion starts when the A/D conversion start flag changes to “1”
A/D conversion starts when the A/D conversion start flag is “1” and the
8-bit resolution: 49 f
8-bit resolution: 28 f
to P10
TRG
2LSB
3LSB
3
2LSB
= 5V
= 3V
= 5V
= 3V
2
9
/P9
CC
7
7
, P9
0
input changes from “H” to “L”
AD
(V
to AN
16
CC
5
frequency must be under 10 MHz by dividing.
f
f
, and P9
AD
AD
7LSB
to connect V
)
7
, f
/2, f
) + 2 pins (ANEX
AD
AD
AD
AD
AD
AD
/2, f
frequency to 250kHz min.
6
/4
frequency to 1MHz min.
0
cycles, 10-bit resolution: 59 f
cycles, 10-bit resolution: 33 f
Performance
also function as the analog signal input pins. The
AD
to AN
REF
/4
7
.
in the mode which external operation amp
0
and ANEX
f
f
AD
AD
=f(X
=f(X
IN
IN
)
)
1
)
AD
AD
cycles
cycles
21. A/D Converter