M30802FCGP#D3 Renesas Electronics America, M30802FCGP#D3 Datasheet - Page 322

IC M16C MCU FLASH 128K 144LQFP

M30802FCGP#D3

Manufacturer Part Number
M30802FCGP#D3
Description
IC M16C MCU FLASH 128K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/80r
Datasheet

Specifications of M30802FCGP#D3

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M
R
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1
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6
Table 32.3 Status register 1 (SRD1)
1 .
0
C
Status Register 1 (SRD1)
SRD1 bits
SR15 (bit7)
SR14 (bit6)
SR13 (bit5)
SR12 (bit4)
SR11 (bit3)
SR10 (bit2)
SR9 (bit1)
SR8 (bit0)
9
0 .
8 /
B
Status register 1 indicates the status of serial communications, results from ID checks and results from
check sum comparisons. It can be read after the SRD by writing the read status register command (70
Also, status register 1 is cleared by writing the clear status register command (50
Table 31.3 gives the definition of each status register 1 bit. “00
the flag status is maintained even after the reset.
0
0
Boot Update Completed Bit (SR15)
Check Sum Consistency Bit (SR12)
ID Check Completed Bits (SR11 and SR10)
Data Reception Time Out (SR9)
0
1
A
This flag indicates whether the control program was downloaded to the RAM or not, using the down-
load function.
This flag indicates whether the check sum matches or not when a program, is downloaded for execu-
tion using the download function.
These flags indicate the result of ID checks. Some commands cannot be accepted without an ID
check.
This flag indicates when a time out error is generated during data reception. If this flag is attached
during data reception, the received data is discarded and the microcomputer returns to the command
wait state.
G
8
u
7
o r
. g
0 -
u
1
0
p
0
, 2
0
2
0
0
5
Page 309
Boot update completed bit
ID check completed bits
Data receive time out
Checksum match bit
Status name
f o
Reserved
Reserved
Reserved
3
2
9
Update co
Time out
Match
"1"
00
01
10
11
-
-
-
mpleted
16
” is output when power is turned ON and
Not verified
Verification mismatch
Reserved
Verified
Definition
32. Standard serial I/O mode
Normal operation
Not update
Mismatch
"0"
16
-
-
-
).
16
).

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