M30802FCGP#D3 Renesas Electronics America, M30802FCGP#D3 Datasheet - Page 81

IC M16C MCU FLASH 128K 144LQFP

M30802FCGP#D3

Manufacturer Part Number
M30802FCGP#D3
Description
IC M16C MCU FLASH 128K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/80r
Datasheet

Specifications of M30802FCGP#D3

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M
R
R
e
E
1
v
J
Table 9.7 Relationship between Interrupts without Interrupt Priority Levels and IPL
6
Figure 9.6 Stack status before and after an interrupt request is acknowledged
1 .
0
C
9.14 Saving Registers
9
0 .
Interrupt sources without interrupt priority levels
Watchdog timer, NMI
Reset
Other
8 /
Stack status before interrupt request is acknowledged
B
When an interrupt request is acknowledged, the interrupt priority level of the acknowledged interrupt is
set to the processor interrupt priority level (IPL).
If an interrupt request is acknowledged that does not have an interrupt priority level, the value shown in
Table 9.7 is set to the IPL.
In an interrupt sequence, only the contents of the flag register (FLG) and program counter (PC) are
saved to the stack area.
The order in which these contents are saved is as follows: First, the FLG register is saved to the stack
area. Next, the 16 high-order bits and 16 low-order bits of the program counter expanded to 32-bit are
saved. Figure 9.6 shows the stack status before an interrupt request is acknowledged and the stack
status after an interrupt request is acknowledged.
In a high-speed interrupt sequence, the contents of the flag register (FLG) is saved to the flag save
register (SVF) and program counter (PC) is saved to PC save register (SVP).
If there are any other registers you want to be saved, save them in software at the beginning of the
interrupt routine. The PUSHM instruction allows you to save all registers except the stack pointer (SP)
by a single instruction.
The execution speed is improved when register bank 1 is used with high speed interrupt register selected
by not saving registers to the stack but to the switching register bank. In this case, switch register bank
mode for high-speed interrupt routine.
0
9.13 Changes of IPL When Interrupt Request Acknowledged
0
0
Address
1
A
8
G
u
7
o r
m-6
m-5
m–4
m–3
m–2
m–1
m
m+1
. g
0 -
u
1
0
p
0
, 2
MSB
0
2
0
0
Content of
previous stack
Content of
previous stack
5
Stack area
Page 68
_______
f o
3
2
LSB
9
[SP]
Stack pointer
value before
interrupt occurs
Stack status after interrupt request is acknowledged
Address
m-6
m-5
m–4
m–3
m–2
m–1
m
m+1
MSB
Value that is set to IPL
Content of
previous stack
Content of
previous stack
Program counter
Program counter
Program counter
Flag register
Flag register
Stack area
(FLG
Not changed
(PC
(FLG
(PC
(PC
0
M
L
H
L
)
)
)
H
)
0
)
7
0
9. Interrupt Outline
LSB
[SP]
New stack
pointer value

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