M30802FCGP#D3 Renesas Electronics America, M30802FCGP#D3 Datasheet - Page 39

• Manufacturer Part Number: M30802FCGP#D3
• Description: IC M16C MCU FLASH 128K 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30802FCGP#D3

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M
R
R
6. Processor Mode
e
E
1
v
J
6
1 .
0
Software Reset
(1) Types of Processor Mode
(2) Setting Processor Modes
C
9
0 .
Writing “1” to bit 3 of the processor mode register 0 (address 0004
microcomputer. A software reset has the same effect as a hardware reset. The contents of internal RAM
are preserved.
Carry out a software reset after oscillation of main clock is fully stable.
One of three processor modes can be selected: single-chip mode, memory expansion mode, and micro-
processor mode. The functions of some pins, the memory map, and the access space differ according to
the selected processor mode.
The processor mode is set using the CNV
0004
Regardless of the level of the CNV
never change the processor mode bits when changing the contents of other bits. Do not change the
processor mode bits simultaneously with other bits when changing the processor mode bits "01
"11
from the microprocessor mode within the program stored in the internal ROM area.
Figures 6.1 and 6.2 show the processor mode register 0 and 1.
Figure 6.3 shows the memory maps applicable for each processor modes.
8 /
B
0
• Single-chip mode
• Memory expansion mode
• Microprocessor mode
• Applying V
• Applying V
0
0
1
In single-chip mode, only internal memory space (SFR, internal RAM, and internal ROM) can be
accessed. However, after the reset has been released and the operation of shifting from the micropro-
cessor mode has started ("H" applied to the CNV
even if the CPU shifts to the single-chip mode.
Ports P0 to P10 can be used as programmable I/O ports or as I/O ports for the internal peripheral
functions.
In memory expansion mode, external memory can be accessed in addition to the internal memory
space (SFR, internal RAM, and internal ROM). However, after the reset has been released and the
operation of shifting from the microprocessor mode has started ("H" applied to the CNVSS pin), the
internal ROM area cannot be accessed even if the CPU shifts to the memory expansion mode.
In this mode, some of the pins function as the address bus, the data bus, and as control signals. The
number of pins assigned to these functions depends on the bus and register settings. (See “Bus
Settings” for details.)
In microprocessor mode, the SFR, internal RAM, and external memory space can be accessed. The
internal ROM area cannot be accessed.
In this mode, some of the pins function as the address bus, the data bus, and as control signals. The
number of pins assigned to these functions depends on the bus and register settings. (See “Bus
Settings” for details.)
The microcomputer begins operation in single-chip mode after being reset. Memory expansion mode
is selected by writing “01
The microcomputer starts to operate in microprocessor mode after being reset.
2
A
8
G
". Change the processor mode bits after changeing the other bits. Also do not attempt to shift to or
u
7
16
o r
. g
0 -
). Do not set the processor mode bits to “10
u
1
0
p
0
, 2
0
2
0
0
SS
CC
5
Page 26
to CNV
to CNV
SS
SS
f o
2
pin
pin
” to the processor mode is selected bits.
3
2
9
SS
pin, changing the processor mode bits selects the mode. Therefore,
SS
pin and the processor mode bits (bits 1 and 0 at address
2
”.
SS
pin), the internal ROM area cannot be accessed
16
) applies a (software) reset to the
6. Processor Mode
2
" or