M30802FCGP#D3 Renesas Electronics America, M30802FCGP#D3 Datasheet - Page 46

• Manufacturer Part Number: M30802FCGP#D3
• Description: IC M16C MCU FLASH 128K 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30802FCGP#D3

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M
R
R
7.2 Bus Control
e
E
1
v
J
Table 7.4 External areas specified by the chip select signals
6
Memory space
1 .
0
The following explains the signals required for accessing external devices and software waits. The signals
required for accessing the external devices are valid when the processor mode is set to memory expansion
mode and microprocessor mode.
(1) Address bus/data bus
(2) Chip select signals
C
9
expansion
0 .
8 /
There are 24 pins, A
is an inverted output of the MSB of the address.
The data bus consists of pins for data IO. The external data bus control register (address 000B
the 8-bit data bus, D
by default an 8-bit data bus for the external area 3 when the BYTE pin is “H”, or a 16-bit data bus when the
BYTE pin is “L”.
When shifting from single-chip mode to extended memory mode, the value on the address bus is unde-
fined until an external area is accessed.
When accessing a DRAM area with DRAM control in use, a multiplexed signal consisting of row address
and column address is output to A
The chip select signals share A
1 (address 0005
outputs.
In microprocessor mode, external area mode 0 is selected after a reset. The external area can be split
into a maximum of four using the chip select signals. Table 7.4 shows the external areas specified by the
chip select signals.
B
0
mode
0
Mode 1
0
Mode 3
Mode 0
Mode 2
1
A
G
8
u
7
o r
. g
0 -
u
1
0
p
0
, 2
0
Memory expansion mode
Microprocessor mode
Microprocessor mode
Memory expansion mode
Memory expansion mode
Microprocessor mode
2
0
0
5
16
Page 33
Processor mode
) to set the external area mode, then select the chip select area and number of address
0
0
to A
to D
22
7
for each external area, or the 16-bit data bus, D
f o
and A
3
0
2
9
to A
____
23
8
to A
22
for the address bus for accessing the 16 Mbytes address space. A
and A
20
E00000
C00000
E00000
C00000
C00000
F00000
(1 Mbytes)
(2 Mbytes)
(2 Mbytes)
(3 Mbytes)
(4 Mbytes)
EFFFFF
(1 Mbytes)
DFFFFF
EFFFFF
FFFFFF
FFFFFF
FFFFFF
.
(A23)
____
CS0
23
. You can use bits 0 and 1 of the processor mode register
16
16
16
16
16
16
16
16
16
16
16
16
to
to
to
to
to
to
(4064 Kbytes)
(2016 Kbytes)
008000
008000
100000
(1 Mbytes)
1FFFFF
3FFFFF
1FFFFF
(A22)
CS1
16
16
16
Chip select signal
16
16
16
to
to
to
200000
200000
0
(2 Mbytes)
(1 Mbytes)
3FFFFF
2FFFFF
to D
(A21)
(A21)
CS2
15
16
16
. After a reset, there is
16
16
to
to
C00000
(1 Mbytes)
CFFFFF
16
(A20)
(A20)
(A20)
CS3
) selects
16
7. Bus
16
to
____
23