M30802FCGP#D3 Renesas Electronics America, M30802FCGP#D3 Datasheet - Page 272

IC M16C MCU FLASH 128K 144LQFP

M30802FCGP#D3

Manufacturer Part Number
M30802FCGP#D3
Description
IC M16C MCU FLASH 128K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/80r
Datasheet

Specifications of M30802FCGP#D3

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M
R
R
e
E
1
v
J
6
Figure 28.16 V
1 .
0
C
9
0 .
8 /
B
Memory expansion Mode and Microprocessor Mode (with 1 wait)
0
0
0
BCLK
ALE
CSi
ADi
BHE
RD
BCLK
ALE
CSi
WR,WRL,
WRH
DBi
DB
ADi
BHE
Read Timing
Write Timing
1
A
G
8
u
7
o r
. g
0 -
u
*3:It depends on operation frequency.
1
0
p
0
, 2
0
t
(n=1, 2 and 3 when 1 wait, 2 wait and 3 wait, respectively.)
t
t
t
t
(n=1, 3 and 5 when 1 wait, 2 wait and 3 wait, respectively.)
d(DB-WR)
h(WR-DB)
h(WR-AD)
h(WR-CS)
w(WR)
*1:It is a guarantee value with being alone. 55ns.max garantees as t
*2:It depends on operation frequency.
2
t
CC
0
d(BCLK-AD)
t
d(BCLK-ALE)
0
t
25ns.max
=3V timing diagram (2)
5
d(BCLK-ALE)
25ns.max
=(tcyc/2 x n-20)ns.min
t
t
ac2(RD-DB)
ac2(AD-DB)
Page 259
t
t
10ns.max
t
25ns.max *1
t
=(tcyc x n-40)ns.min
=(tcyc/2-20)ns.min
=(tcyc/2-20)ns.min
=(tcyc/2-20)ns.min
25ns.max *1
25ns.max
25ns.max
d(BCLK-CS)
d(BCLK-CS)
d(BCLK-AD)
d(BCLK-RD)
tcyc
tcyc
=(tcyc/2 x m-42)ns.max (m=3, 5 and 7 when 1 wait, 2 wait and 3 wait, respectively.)
=(tcyc x n-55)ns.max (n=2, 3 and 4 when 1 wait, 2 wait and 3 wait, respectively.)
t
h(BCLK-ALE)
f o
t
25ns.max
-2ns.min
t
d(BCLK-WR)
-2ns.min
3
h(BCLK-ALE)
2
Hi-Z
9
t
ac2(AD-DB) *2
t
t
d(DB-WR) *3
ac2(RD-DB)
t
t
w(WR)
su(DB-BCLK)
40ns.min
*2
*3
*1
t
t
t
h(BCLK-WR)
t
h(WR-CS) *3
h(WR-AD)
0ns.min
h(WR-DB) *3
*3
Measuring conditions
t
h(BCLK-AD)
t
• V
• Input timing voltage
• Output timing voltage
t
h(BCLK-RD)
t
t
h(BCLK-CS)
-3ns.min
h(BCLK-CS)
0ns.min
0ns.min
h(BCLK-AD)
0ns.min
0ns.min
t
t
t
CC
0ns.min
h(RD-CS)
h(RD-AD)
h(RD-DB)
0ns.min
d(BCLK-AD)
:Determined with V
:Determined with V
0ns.min
=3V±10%
28. Electrical characteristics
+t
su(DB-BCLK)
IH
OH
=1.5V, V
.
=1.5V, V
Vcc=3V
IL
OL
=0.5V
=1.5V

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